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Learn more about Silicon Carbide (SiC)
A full ecosystem of parts to support wide bandgap power designs, including SiC Diodes, SiC MOSFETs, and SiC Modules.
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Explore the Rain and Light Sensor solution!
The rain and light sensors are small opto-electronic modules typically located in the vehicle’s rearview mirror.
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Try our WebDesigner+ Design Tool to help you select the optimum products for your application requirements.
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Are you looking for something to do? Join us at the PCIM Europe 2022 tradeshow!
May 10-12, 2022
The PCIM Europe is the world's leading exhibition and conference for power electronics, intelligent motion, renewable energy, and energy management.
The ON Semiconductor SC3 standard cell family combines compact,
building block standard cells and soft IP with high
speed memory and datapath functions. Using a 0.35 μm,
high performance CMOS process, the SC3 family offers
a lower cost alternative to gate arrays for high volume
applications.
Features
Up to 2 M logic gates and 2 M bits of RAM
Excellent performance:
980 MHz maximum toggle rate on clocked flip-flops
High speed operation: 67 ps delay for a 2-input NAND gate (FO=2; L=0 mm;
VDD=3.3 V)
Low power operation: 86 ps delay for a 2-input NAND gate
(FO=2; L=0 mm; VDD=2.5 V)
6ns clock-to-out performance (CL = 35 pF)
Mixed voltage operation:
Split power supply bussing between core and pads
3.3 V or 2.5 V core operation
2.5 V, 3.3 V, 5 V I/O
5 V tolerant I/O cells
Operating temperature range -55 to 150°C
Cost driven architecture:
2 or 3 level metal interconnect provides lowest device
cost for gates and pads required
Extensive library for quick design:
Complete core cell and I/O library
IP functions include processors, peripherals and
datapath synthesizers
Extensive memory support:
Synchronous single, 2-port and dual port up to 16 Kx8 bits
Dedicated BIST ports
Memory compilers optimized for speed, density, and low power
Synchronous ROM compiler from 64x1 to 16 Kx32 bits
User-configurable pad cells with predefined
components
1 to 24 mA per single I/O cell
Custom configurations for I/O drive up to 96 mA
Standard and slew rate limited availability
PCI 33 MHz and 66 MHz compliant
CMOS, TTL, LVCMOS, LVTTL, PCI 33/66 levels
Extensive DFT methodology:
Scan-chain insertion and reordering
Built-in self test (BIST) for memory blocks
Automatic test program generation (ATPG)
JTAG boundary scan insertion
JTAG boundary scan macro support
Extensive packaging capabilities:
0.65 mm to 1.27 mm pitch BGAs
CSPs, QFPs, CQFPs, TQFPs, PLCCs, LCCs, JLCCs
Stacked packages with flash
Burn-in capability as required
Full operating voltage range from 2.25 V to 3.6 V
ESD protection > 2k V
Latchup > 100 mA
Power dissipation: 0.84 μW/MHz/gate (FO=1; VDD=3.3 V)
Power dissipation: 0.36 μW/MHz/gate (FO=1; VDD=2.5 V)
Applications
SC3 standard cell technology targets high volume
digital ASIC products. The low device cost
accommodates designs requiring significant on-board
memory, data path logic or IP blocks.
SC3 wafers are produced in ON Semiconductor's domestic wafer fab. In addition ON Semiconductor offers a complete on-shore flow including design, mask generation, silicon, packaging, and test complete with ITAR and NOFORN processing to support government and military programs. SC3 has extensive flight heritage.
Mid-Range ASIC Design: SC3 provides a cost effective solution for mid-range applications with gate counts up to 2 million gates and up to 2 million bits of memory. Combined with support for a rich family of I/O standards, the ON Semiconductor RTL sign-off and netlist hand-off flows provide quick and seamless access for SC3 designs.
FPGA Conversion: SC3 provides an ideal platform to cost reduce or replace obsolete PLD and FPGA devices, or even advanced FPGAs with suitable performance requirements. SC3 provides extensive support for FPGA memory and timing generator features, including live at power up (LAPU capability).
Support for EOL Products: ON Semiconductor's FPGA-to-ASIC and ASIC-to-ASIC conversion capabilities allow SC3 to be a cost-effective, long-term solution for end-of-life products.
Process Upgrade: ON Semiconductor ASICs designed in 1.25 µm, 1.0 µm, 0.8 µm, 0.6 µm, 0.5 µm processes, and any legacy 3.3 V core technology can be easily upgraded to the SC3 family. The ON Semiconductor ASIC library provides a common netlist design base.
Adding Custom Blocks: ON Semiconductor specializes in combining digital and analog functions in custom ASICs. Analog functions include ADCs and DACs, op-amps and comparators, EMI/RFI filters, AC-DC and DC-DC controllers and regulators, drivers, thermal management, voltage and current management, and digital potentiometers.
Design Flow
ON Semiconductor ASICs are supported on leading third-party software platforms:
Cadence®
Synopsys®
Mentor Graphics™
The ON Semiconductor design flow integrates leading third-party design tools with ON Semiconductor proprietary tools to offer a flexible design interface for mid-range ASIC designs with RTL sign-off, ASIC netlists for ASIC-to-ASIC conversion and FPGA designs for FPGA-to-ASIC conversion. The ON Semiconductor software support methodology ensures a tight, well-coupled flow from design to production. The dedicated, experienced engineering staff from ON Semiconductor can assist at any step of the design process.