Phase Locked Loop (PLL) based phase/frequency detectors.

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Status

Compilance

Input Level

Output Level

VCC Typ (V)

V

V

Transfer Gain Typ (mV/degree)

mV/degree

mV/degree

CMRR Max (V)

V

V

fToggle Max (MHz)

MHz

MHz

tpd Typ (ns)

ns

ns

tJitter Typ (ps)

ps

ps

tR & tF Max (ps)

ps

ps

Package Type

MSL Type

MSL Temp (°C)

ON Target

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Product Groups:

5

Orderable Parts:

8

Product Groups:

5

Orderable Parts:

8

Product Group

Status

CAD Models

Compliance

Input Level

Output Level

VCC Typ (V)

Transfer Gain Typ (mV/degree)

CMRR Max (V)

fToggle Max (MHz)

tpd Typ (ns)

tJitter Typ (ps)

tR & tF Max (ps)

Package Type

MSL Type

MSL Temp (°C)

ON Target

Reference Price

Active

CAD Model

Pb

A

H

P

CML,

ECL

ECL

3.3

1.2073

-

2000

0.475

0.2

200

SOIC-8

1

260

Y

Price N/A

More Details

Active

CAD Model

Pb

A

H

P

ECL

ECL

3.3,

5

0.93

2

2000

0.55

0.2

150

TSSOP-20

1

260

Y

Price N/A

More Details

Active

CAD Model

Pb

A

H

P

ECL

ECL

5

2

1.2

250

1.35

0.2

475

SOIC-20W

3

260

Y

Price N/A

More Details

Active

CAD Model

Pb

A

H

P

ECL

ECL

5

-

-

800

0.44

0.2

350

SOIC-8

1

260

Y

Price N/A

More Details

Active

CAD Model

Pb

A

H

P

ECL

ECL

5

-

-

800

0.44

0.2

350

SOIC-8

1

260

Y

Price N/A

More Details

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