PLL Clock Generators

Technical Documentation
The portfolio of PLL Clock Generators from ON Semiconductor includes high-performance PLL Clock Generator devices providing CMOS, TTL, Crystal, HCSL, LVDS, LVCMOS, LVPECL, or ECL input levels with CMOS, TTL, ECL, LVCMOS, LVPECL, CML, HSCL, or LVDS output levels. The ideal performance characteristics of these devices include user-programmable clock frequencies, configurable outputs, Flexible Input/Core and Output Power Supply Combinations, Independent Power Supply per Output Bank, and I2C/SMBus Compatible Interface. Additional features include Zero ppm Multiplication Error, Fractional Divide Ratios for Implementing Arbitrary FEC/Inverse−FEC Ratios, very low phase noise PLL, and a small circuit board footprint. Applications include Audio systems, Digital video systems, Telecom, Networking, Ethernet, SONET, Solid State Hard Drive, Industrial, Consumer electronics, Computing and peripherals, and portable devices. The PLL Clock Generators from ON Semiconductor are ideally suited for use in smart wearables, smartphones, digital camera, camcorders, set-top boxes, printers, eBooks, media players, display (TV wall), servers and desktop computers, networking switches and routers, PCIe devices, and automated test equipment. The portfolio also includes AEC-Q101 Qualified and PPAP Capable options specifically engineered and qualified for automotive industry applications, including infotainment, in-cabin electronics, and autonomous vehicles.
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