feedback
Rate this webpage
Need
Support?

MC100EP52: ECL Differential Clock/Data D Flip-Flop

Datasheet: 3.3 V / 5 V ECL Differential Data and Clock D Flip Flop
Rev. 8 (183kB)
Product Overview
»View Reliability Data
»View Material Composition
» Product Change Notification
The MC10EP/100EP52 is a differential data, differential clock D flip-flop with reset. The device is functionally equivalent to the EL52 device. Data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The differential clock inputs of the EP52 allow the device to also be used as a negative edge triggered device. The EP52 employs input clamping circuitry so that under open input conditions (pulled down to VEE ) the outputs of the device will remain stable.
Features
 
  • 330ps Typical Propagation Delay
  • Maximum Frequency > 4 GHz Typical
  • PECL Mode: VCC = 3.0 V to 5.5 V with VEE = 0 V
  • NECL Mode: VCC = 0 V with VEE = -3.0 V to -5.5 V
  • Open Input Default State
  • Safety Clamp on Inputs
  • Q Output will default LOW with inputs open or at VEE
  • Pb-Free Packages are Available
Applications
  • Negative edge-triggering
Availability & Samples
Specifications
Case Outlines
Product
Status
Compliance
Description
Package
MSL
Container
Budgetary Price/Unit
Type
Case Outline
Type
Temperature
Type
Qty.
MC100EP52DG Active
Pb-free
Halide free
MC100EP52 SOIC-8 751-07 1 260 Tube 98 Contact Sales Office
MC100EP52DR2G Active
Pb-free
Halide free
MC100EP52 SOIC-8 751-07 1 260 Tape and Reel 2500 Contact Sales Office
MC100EP52DTG Active
Pb-free
Halide free
MC100EP52 TSSOP-8 948R-02 3 260 Tube 100 Contact Sales Office
MC100EP52DTR2G Active
Pb-free
Halide free
MC100EP52 TSSOP-8 948R-02 3 260 Tape and Reel 2500 Contact Sales Office
MC100EP52MNR4G Active
Pb-free
Halide free
MC100EP52 DFN-8 506AA 1 260 Tape and Reel 1000 Contact Sales Office
Market Leadtime (weeks) : Contact Factory
Avnet   (2020-08-19 00:00) : <1K
ON Semiconductor   (2020-09-02 00:00) : 4,018
Market Leadtime (weeks) : 2 to 4
ON Semiconductor   (2020-09-02 00:00) : 15,000
Market Leadtime (weeks) : 2 to 4
Avnet   (2020-08-19 00:00) : <1K
Market Leadtime (weeks) : 2 to 4
Market Leadtime (weeks) : 2 to 4
ON Semiconductor   (2020-09-02 00:00) : 16,000
PandS   (2020-09-14 00:00) : <1K

Product
Description
Pricing ($/Unit)
Compliance
Status
Type
Bits
Input Level
Output Level
VCC Typ (V)
tJitter Typ (ps)
tpd Typ (ns)
tsu Min (ns)
th Min (ns)
trec Typ (ns)
tR & tF Max (ps)
fToggle Typ (MHz)
Package Type
MC100EP52DG  
Pb
H
 Active   
D-Type
1
CML
ECL
ECL
3.3
5
0.2
0.33
0.05
0
170
4000
SOIC-8
MC100EP52DR2G  
Pb
H
 Active   
D-Type
1
CML
ECL
ECL
3.3
5
0.2
0.33
0.05
0
170
4000
SOIC-8
MC100EP52DTG  
Pb
H
 Active   
D-Type
1
CML
ECL
ECL
3.3
5
0.2
0.33
0.05
0
170
4000
TSSOP-8
MC100EP52DTR2G  
Pb
H
 Active   
D-Type
1
CML
ECL
ECL
3.3
5
0.2
0.33
0.05
0
170
4000
TSSOP-8
MC100EP52MNR4G  
Pb
H
 Active   
D-Type
1
CML
ECL
ECL
3.3
5
0.2
0.33
0.05
0
-
170
4000
DFN-8
Case Outlines
751-07    948R-02    506AA   
Packages
MC100EP52: ECL Differential Clock/Data D Flip-Flop
Previously Viewed Products
Clear List

Your request has been submitted for approval.
Please allow 2-5 business days for a response.
You will receive an email when your request is approved.
Request for this document already exists and is waiting for approval.