SP40: 40 nm Standard Cell ASIC
The ON Semiconductor SP40 standard cell family combines various standard cell, memory and I/O options to optimize speed, area and power performance for customer targets. The SP40 also offers wide variety of IP options to enable multiple applications.
SP40 targets low to high volume digital ASIC products in the Military and Aerospace, Industrial, Networking & Telecommunications, Computing and Consumer markets. The high performance capabilities of the process make SP40 ideal for high speed applications including high performance ARM processor, Memory interface, Communication interface and Analog cells. Combined with support for a rich family of IP, SP40 supports applications in military munitions, radar systems, avionics, secure communications, wireless infrastructure, industrial controls, printers and infotainment. The ON Semiconductor RTL signoff, netlist hand-off and optional Spec handoff flows provide quick and seamless access for SP40 designs.
ON Semiconductor can also provide customers with a comprehensive library of soft IP that can be prototyped in an FPGA, further easing the process of getting to a cost competitive, low power ASIC for production.
ASIC Design Tools and Methodology
ON Semiconductor ASICs are supported on leading third-party software platforms:
- Mentor Graphics™
The ON Semiconductor design flow integrates leading third-party design tools with ON Semiconductor proprietary tools to offer a flexible design interface for mid-range ASIC designs with RTL sign-off, ASIC netlists for ASIC-to-ASIC conversion and FPGA designs for FPGA-to-ASIC conversion. The ON Semiconductor software support methodology ensures a tight, well-coupled flow from design to production. The dedicated, experienced engineering staff from ON Semiconductor can assist at any step of the design process.