ONC18: 0.18 µm CMOS Process Technology

Overview
Product Description
The ONC18 process from ON Semiconductor is a low cost industry compatible 0.18 µm CMOS technology manufactured in the United States. This full featured process includes 1.8 V/3.3 V dual gate I/Os, nominal and high value MIM capacitors, resistors, and six levels of metal. A comprehensive design kit offers an expansive core, I/O, and memory library. Specialty services including stitching and shuttle prototyping are available. ONC18 also serves as a platform for highly integrated high voltage mixed-signal processes ideal for many automotive, industrial, medical, and military applications.

Features
  • 4 to 6 Metal layers
  • 1.0 fF/µm2 Metal-insulator-metal (MIM) capacitor
  • 2.0 fF/µm2 Metal-insulator-metal (MIM) capacitors (design dependent)
  • 4.0 fF/µm2 Metal-insulator-metal (MIM) stacked capacitors (design dependent)
  • Salicide process with optional blocking
  • 1.8 V, 3.3V core voltage and 3.3 V I/O voltage with 5V tolerant input
  • Poly, diffusion, and well resistors

Process Characteristics

Operating Voltage 1.8 V, 3.3 V
Substrate Material P-Type
Drawn Transistor Length 0.18 µm
Gate Oxide Thickness 2.9 nm/6.5 nm
Contact/Via Size 0.22 µm/0.26 µm
Metal Thickness M1-MTop-1 - 0.56 µm
MT(0.8um) - 0.94 µm
MT(3.0um) - 3.14 µm
Contacted Metal Pitch
Metal 1 0.46 µm
Metal 2-Top-1 0.56 µm
Metal Top (0.8 µm) 0.9 µm
Metal Top (3.0 µm) 6 µm
Metal Composition AI-0.5%Cu/TiN

Process Options Mask Layers
1 poly, 4 metal 25
1 poly, 5 metal 27
1 poly, 6 metal 29
1 poly, 4 metal, MIM 26
1 poly, 5 metal, MIM 28
1 poly, 6 metal, MIM 30

Device Characteristics
(All Values Typical at 25°C)

Transistors

N-Channel Typical Value Unit
Vt (Standard VT) 0.476 V
Idsat (Standard VT) 600 µA/µm
Vt (High VT) 0.649 V
Idsat (High VT) 410 µA/µm
Vt (Native VT) -0.093 V
Idsat (Native VT) 546 µA/µm

P-Channel Typical Value Unit
Vt (Standard VT) -0.49 V
Idsat (Standard VT) -260 µA/µm
Vt (High VT) -0.65 V
Idsat (High VT) -178 µA/µm

Thick Gate Transistors

N-Channel Typical Value Unit
Vt (Standard VT) 0.765 V
Idsat (Standard VT) 550 µA/µm
Vt (Low VT) 0.33 V
Idsat (Low VT) 630 µA/µm
Vt (Native VT) -0.112 V
Idsat (Native VT) 520 µA/µm
Vt (15 Vds device) 0.701 V
Idsat (15 Vds device) 397 µA/µm

P-Channel Typical Value Unit
Vt -0.673 V
Idsat -310 µA/µm
Vt (15 Vds device) -0.816 V
Idsat (15 Vds device) -130 µA/µm

Resistors

Typical Value Unit
N+ Poly 6.55 Ω/square
P+ Poly 5.78 Ω/square
N+ Poly Unsalicided 290 Ω/square
P+ Poly Unsalicided 290 Ω/square
N-Diffusion Unsalicided 68 Ω/square
P-Diffusion Unsalicided 127 Ω/square
P+ Poly Low Temp Coeff 295 Ω/square
High Poly Resistor 1037 Ω/square
N-Well 950 Ω/square
High Poly Resistor 1037 Ω/square
Top Metal Resistor (0.8 µm) 37 mΩ/square
Top Metal Resistor (3 µm) 9.8 mΩ/square

Capacitors

Typical Value Unit
Single MIM Area 1 fF/µm2
Single MIM (HD) Area 2 fF/µm2
Stacked MIM (HD) Area 4 fF/µm2
Moscap (thin gate) 6.5 fF/µm2
Moscap (thick gate) 4.88 fF/µm2
Linear Moscap (thin gate) 7.9 fF/µm2
Linear Moscap (thick gate) 3.7 fF/µm2
Finger Cap 0.51 fF/µm2
Finger Cap (high density) 0.7 fF/µm2

Diodes

Zener Diode Typical Value Unit
Breakdown Voltage -5.1 V @ i=10uA
V in forward reg 0.78 V @

Schottky Diode Typical Value Unit
Forward current -9.783 LOG(A)
Forward voltage 0.325 V @
Libraries
(All values typical at 1.8 V, 25°C)

Front-End Digital Design
Digital
Synthesis Libraries
Simulation Libraries
Analog
Design Rules
Spice Models

Standard Core Cell Density (gates/mm2) Operating Voltage Leakage (nW) Propagation Delay (ps) Dynamic Power (mW/MHz/gate)
1.8 V Standard Core Cell 99.6 k 1 V, 1.5 V, 1.8 V 0.136 137 with 0.015 pF L 0.000031
1.8 V Low Leakage Core Cell 99.6 k 1.5 V, 1.8 V 0.008 171 with 0.0148 pF L 0.000021
3.3 V High Voltage Core Cell 70.8 k 3.3 V 0.00097 112 with 0.0194 pF L 0.00016
Level Shifter n/a 1.8 V, 3.3 V n/a n/a n/a
* All the data derived from 2nand cell under nominal voltage and 25 degree C

IO Library description CUP Support Operating Voltage (+/-10%) N-well Option 5 V Tolerant 3 V Tolerant Pad Height (um) Inline Pad Pitch (um) Max Output Strength per Pad (mA)
1.8 V Yes 1 V, 1.8 V Regular N Y 116.64 84.24 12
3.3 V 3.3 V, 2.2 V Y Y 129.6 84.24 12
1.8 V 1 V, 1.8 V Deep N Y 136.08 84.24 12
3.3 V/1.8 V w/level-shift 2.2 V, 3.3 V Y Y 151.2 84.24 12
3.3 V 1.8 V, 3.3 V Y Y 151.2 84.24 12
1.8 V thin gate, 3.3 V thick gate, SVt, 6M No 1.8 V, 2.5 V, 3.3 V Regular Y Y 235 60 24
1.8 V thin gate, 3.3 V thick gate, SVt, 5M 1.8 V, 2.5 V, 3.3 V Y Y 235 60 24


Memory Options

Compiled Memory Description MEM-Type Max Capacity per Instance bit Density (eq. bits/mm^2) (1) Operating Voltage (V) Max Frequency (MHz) (2) Leakage Current (uA) (2) Dynamic Power (nW/MHz) (2)
ONC18 HVT Single port SRAM SRAM 589 Kbits 160 K 1.0, 1.5 V, 1.8 V 200 2 311
ONC18 HVT Dual port SRAM DPRAM 294 Kbits 80 K 1.0, 1.5 V, 1.8 V 200 3 285
ONC18 HVT ROM ROM 1.1 Mbits 900 K 1.0, 1.5 V, 1.8 V 150 0.5 183
ONC18 SVT Single port SRAM SRAM 589 Kbits 160 K 1.0, 1.2 V 1.5 V, 1.8 V 300 50 310
ONC18 SVT Dual port SRAM DPRAM 294 Kbits 80 K 1.0, 1.2 V 1.5 V, 1.8 V 300 70 300
ONC18 SVT ROM ROM 1.1 Mbits 900 K 1.0, 1.2 V 1.5 V, 1.8 V 200 40 141
ONC18 3.3 V Signal port SRAM (3) SRAM 589 Kbits 110 K 1.8 V, 3.3 V 100 0.5 n/a
ONC18 3.3 V Dual port SRAM (3) DPRAM 589 Kbits 75 K 1.8 V, 3.3 V 100 0.5 n/a
ONC18 3.3 V ROM (3) ROM 589 Kbits 850 K 1.8 V, 3.3 V 100 0.1 n/a
1) all the data derived from 256Kb instance
2) Max frequency and leakage current evaluated based on 256K bit configuration (4Kx64), at PwcsV162T125
3) This Memory Complier is under development

Non-Volatile Memory
OTP – One Time Programmable
Sidense 1.8/3.3 V gate-rupture
1k-bit array and 256 k-bit array
In field programming capable
EEPROM – No additional masks or processing steps
Vector: Up to 64 bits supported
Internal Charge Pump provided

CAD Tool Compatibility

Digital Design
Synopsys Design Compiler
Cadence RTL Compiler
Mentor Graphics FastScan (DFT)

Analog/Mixed-Signal Design
Cadence Virtuoso, VirtuosoXL, Spectre
Mentor Graphics Design Architect IC, IC Station, and Eldo

Place and Route
Cadence Encounter

Physical Verification
Mentor Graphics Calibre

   

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