NCP51510: ±3A Sink/Source DDR Termination Regulator
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NCP51510 is a source/sink Double Data Rate (DDR) termination regulator specifically designed for low input voltage and low-noise systems where space is a key consideration. The NCP51510 maintains a fast transient response anda only requires a minimum VTT load capacitance of 10uF for output stability. The NCP51510 supports remote sensing and all power requirements for DDR VTT bus termination. The NCP51510 can also be used in low-power chipsets and graphics processor cores that require dynamically adjustable output voltages. The NCP51510 is available in the thermally-efficient DFN10 Exposed Pad Package, and is rated both Green and Pb-Free.
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Technical Documentation & Design Resources
Tutorials (1) | Data Sheets (1) |
Simulation Models (1) | Package Drawings (2) |
Availability & Samples
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Specifications
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Case Outline |
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NCP51510MNTAG | Active |
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NCP51510 | DFN-10 | 485C | 1 | 260 | Tape and Reel | 3000 | $0.4667
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NCV51510MNTAG | Active |
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NCP51510 | DFN-10 | 485C | 1 | 260 | Tape and Reel | 3000 | $0.7773
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NCV51510MWTAG | Active |
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NCP51510 | DFN-10 | 485C | 1 | 260 | Tape and Reel | 3000 | $0.7773
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Market Leadtime (weeks) | : | Contact Factory |
Market Leadtime (weeks) | : | 4 to 8 |
ON Semiconductor (2020-09-02 00:00) | : | 6,000 |
Market Leadtime (weeks) | : | 4 to 8 |
Product
Description
Pricing ($/Unit)
Compliance
Status
DDR Memory Type
IOUT VTT Max (A)
IQ Typ (µA)
VCC Bias Min (V)
VCC Bias Max (V)
Remote Sense
Power Good
Package Type
Support |