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NCP51200: 3A Sink/Source DDR Termination Regulator w/ VTTREF Buffered Reference for DDR2, DDR3, DDR3L and DDR4

Datasheet: Linear Voltage Regulator 3 A for DDR1, DDR2, DDR3, LPDDR3, DDR4 VTT Termination
Rev. 12 (184kB)
Product Overview
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» Product Change Notification
The NCP51200 is a source/sink Double Data Rate (DDR) termination regulator specifically designed for low input voltage and low-noise systems where space is a key consideration. The NCP51200 maintains a fast transient response and only requires a minimum output capacitance of 20 uF. The NCP51200 supports a remote sensing function and all power requirements for DDR VTT bus termination. The NCP51200 can also be used in low-power chipsets and graphics processor cores that require dynamically adjustable output voltages. In addition, the NCP51200 provides an open-drain PGOOD signal to monitor the output regulation and an EN signal that can be used to discharge VTT during S3 (suspend to RAM) for DDR applications. The NCP51200 is available in the thermally-efficient DFN10 Exposed Pad package, and is rated both Green and Pb-free.
Features
 
  • Input Voltage Rails: Supports 2.5 and 3.3 V Rails
  • PVCC Voltage Range: 1.1 to 3.5 V
  • Integrated Power MOSFETs
  • Fast Load-Transient Response
  • PGOOD-Logic output pin to Monitor VTT Regulation
  • EN-Logic input pin for Shutdown mode
  • VRI-Reference Input Allows for Flexible Input Tracking Either Directly or Through Resistor Divider
  • Remote Sensing (VTTS)
  • Built-in Soft Start, Under Voltage Lockout and Over Current Limit
Applications   End Products
  • DDR Memory Termination
  • Graphics Processor Core Supplies
  • Chipset/RAM Supplies as Low as 0.5 V
  • Active Bus Termination
  • TPS51200 upgrade with improved output accuracy and transient response
 
  • Desktop PC's, Notebooks, and Workstations
  • Servers and Networking equipment
  • Set Top Boxes, LCD-TV/PDP-TV, Copier/Printers
Evaluation/Development Tool Information
Product Status Compliance Short Description Action
SECO-TE0716-GEVB Active
Pb-free
Universal Controller Board (UCB) with Zynq®-7000 SoC FPGA and ARM®-based processor
Availability & Samples
Specifications
Product
Status
Compliance
Description
Package
MSL
Container
Budgetary Price/Unit
Type
Case Outline
Type
Temperature
Type
Qty.
NCP51200MNTXG Active
Pb-free
Halide free
NCP51200 DFN-10 485C 1 260 Tape and Reel 3000 $0.2267
NCV51200MLTXG Active
AEC Qualified
PPAP Capable
Pb-free
Halide free
NCP51200 DFNW-10 507AM 1 260 Tape and Reel 3000 $0.3867
NCV51200MNTXG Active
AEC Qualified
PPAP Capable
Pb-free
Halide free
NCP51200 DFN-10 485C 1 260 Tape and Reel 3000 $0.3667
NCV51200MWTXG Active
AEC Qualified
PPAP Capable
Pb-free
Halide free
NCP51200 DFN-10 485C 1 260 Tape and Reel 3000 $0.3867
Market Leadtime (weeks) : 13 to 16
Market Leadtime (weeks) : 8 to 12
Market Leadtime (weeks) : 4 to 8
Market Leadtime (weeks) : 8 to 12

Product
Description
Pricing ($/Unit)
Compliance
Status
DDR Memory Type
IOUT VTT Max (A)
IQ Typ (µA)
VCC Bias Min (V)
VCC Bias Max (V)
Remote Sense
Power Good
Package Type
NCP51200MNTXG  
 $0.2267 
Pb
H
 Active   
DDR
DDR2
DDR3
DDR3L
DDR4
3
700
2.375
3.5
Yes
Yes
DFN-10
NCV51200MLTXG  
 $0.3867 
Pb
A
H
P
 Active   
DDR
DDR2
DDR3
DDR3L
DDR4
3
700
2.375
3.5
Yes
Yes
DFNW-10
NCV51200MNTXG  
 $0.3667 
Pb
A
H
P
 Active   
DDR
DDR2
DDR3
DDR3L
DDR4
3
700
2.375
3.5
Yes
Yes
DFN-10
NCV51200MWTXG  
 $0.3867 
Pb
A
H
P
 Active   
DDR
DDR2
DDR3
DDR3L
DDR4
3
700
2.375
3.5
Yes
Yes
DFN-10
Case Outlines
485C    507AM   
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