Clock & Data Distribution
[Product View]
For clock and timing trees, and data distribution trees, ON Semiconductor supplies high frequency, differential devices based on Emitter Coupled Logic (ECL), which provides superior jitter and skew; and single-ended CMOS devices. Devices are available in the PureEdge™, GigaComm™, ECLinPS MAX™, ECLinPS Plus™, ECLinPS Lite™, ECLinPS™, and MECL-10KH™/MECL-100KH™ families.
Products
Differential (ECL) arithmetic functions such as binary counters, clock dividers, and prescalers.
| Technical Documentation & Design Resources | |
| Application Notes (20) | Package Drawings (12) |
| Simulation Models (50) | Evaluation/Development Tools (1) |
| Data Sheets (28) | |
Differential (ECL) fanout buffers, clock drivers and signal drivers.
| Technical Documentation & Design Resources | |
| Application Notes (42) | Videos (1) |
| Simulation Models (210) | Evaluation Board Documents (2) |
| Data Sheets (122) | Evaluation/Development Tools (21) |
| Package Drawings (41) | |
Differential (ECL) D flip-flops, JK flip-flops, latches, registers and shift registers.
| Technical Documentation & Design Resources | |
| Application Notes (19) | Package Drawings (11) |
| Simulation Models (37) | Evaluation/Development Tools (1) |
| Data Sheets (26) | |
Differential (ECL) logic gates, including AND, NAND, OR, NOR, XOR, XNOR, and INV gates.
| Technical Documentation & Design Resources | |
| Application Notes (23) | Data Sheets (17) |
| Simulation Models (38) | Package Drawings (8) |
Differential (ECL) multiplexers (MUXes), and differential (ECL) crosspoint switches.
| Technical Documentation & Design Resources | |
| Application Notes (37) | Package Drawings (11) |
| Simulation Models (41) | Evaluation/Development Tools (4) |
| Data Sheets (33) | |
Differential (ECL) parallel-to-serial and serial-to-parallel converters.
| Technical Documentation & Design Resources | |
| Application Notes (26) | Data Sheets (10) |
| Simulation Models (5) | Package Drawings (6) |
Programmable delay lines for clock skew management.
| Technical Documentation & Design Resources | |
| Application Notes (14) | Package Drawings (3) |
| Simulation Models (4) | Evaluation/Development Tools (2) |
| Data Sheets (6) | |
Differential (ECL) logic level translators that interface with ECL, PECL, CML, LVDS, HSTL, HCSL, TTL, and CMOS devices.
| Technical Documentation & Design Resources | |
| Application Notes (23) | Package Drawings (14) |
| Simulation Models (46) | Evaluation/Development Tools (1) |
| Data Sheets (33) | |
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