FDV304P: P-Channel Digital FET -25V, -0.46A, 1.1Ω
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This P-Channel enhancement mode field effect transistors is produced using a proprietary, high cell density, DMOS technology. This very high density process is tailored to minimize on-state resistance at low gate drive conditions. This device is designed especially for application in battery power applications such as notebook computers and cellular phones. This device has excellent on-state resistance even at gate drive voltages as low as 2.5 volts.
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Technical Documentation & Design Resources
Software (1) | Data Sheets (1) |
Application Notes (12) | Package Drawings (1) |
Simulation Models (1) | Evaluation Board Documents (12) |
Evaluation/Development Tool Information
Product | Status | Compliance | Short Description | Action | |
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STR-NCP164A-WDFN6-GEVB | Active |
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Strata Enabled NCP164A Adjustable LDO, WDFN6 Package Evaluation Board | ||
STR-NCV8164A-DFNW8-GEVB | Active |
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Strata Enabled NCV8164A Adjustable LDO, DFNW8 Package Evaluation Board | ||
STR-NCV8164A-TSOP5-GEVB | Active |
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Strata Enabled NCV8164A Adjustable LDO, TSOP5 Package Evaluation Board |
Availability & Samples
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Specifications
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Case Outline |
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FDV304P | Active |
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FDV304P | SOT-23-3 | 318-08 | 1 | 260 | Tape and Reel | 3000 | $0.0532 | ||||||||
FDV304P-F169 | Last Shipments |
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FDV304P | SOT-23-3 | 318-08 | 1 | 260 | Tape and Reel | 3000 |
Market Leadtime (weeks) | : | 8 to 12 |
Avnet (2020-08-19 00:00) | : | >100K |
Market Leadtime (weeks) | : | Contact Factory |
Product
Description
Pricing ($/Unit)
Compliance
Status
Channel Polarity
Configuration
V(BR)DSS Min (V)
VGS Max (V)
VGS(th) Max (V)
ID Max (A)
PD Max (W)
RDS(on) Max @ VGS = 2.5 V (mΩ)
RDS(on) Max @ VGS = 4.5 V (mΩ)
RDS(on) Max @ VGS = 10 V (mΩ)
Qg Typ @ VGS = 4.5 V (nC)
Qg Typ @ VGS = 10 V (nC)
Ciss Typ (pF)
Package Type
FDV304P
$0.0532
Pb
A
H
P
Active
P-Channel
Single
-25
-8
-1.5
-0.46
0.35
1500
1100
-
-
1.1
63
SOT-23-3
Case Outlines
318-08
Support |