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NB3H5150: Clock Generator, Multi-Rate, Low Noise 2.5V / 3.3V

Datasheet: 2.5V / 3.3V Low Noise Multi-Rate Clock Generator
Rev. 4 (233kB)
Product Overview
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The NB3H5150 is a high performance Multi−Rate Clock generator which simultaneously synthesizes up to four different frequencies from a single PLL using a 25 MHz input reference. The reference frequency can be provided by a crystal, LVCMOS/LVTTL, LVPECL, HCSL or LVDS differential signals. The REFMODE pin will select the reference source. Three output banks (CLK1A/CLK1B to CLK3A/CLK3B) produce user selectable frequencies of: 25 MHz, 33.33 MHz, 50 MHz, 100 MHz, 125 MHz, or 156.25 MHz and have ultra−low noise/jitter performance of less than 0.3 ps. The fourth output bank (CLK4A/CLK4B) can produce the following integer and FRAC−N frequencies in pin−strap mode: 33.33 MHz, 66.66 MHz, 100 MHz, 106.25 MHz, 125 MHz, 133.33 MHz, 155.52 MHz, 156.25 MHz or 161.1328 MHz. More programmable frequencies are available via the I2C interface with jitter performance of less than 1 ps. Detailed registered descriptions will be available in a future application note. Each output block can create two single−ended in−phase LVCMOS outputs or one differential pair of LVPECL outputs. Each of the four output blocks is independently powered by a separate VDDO, 2.5 V/3.3 V for LVPECL, 1.8 V/2.5 V/3.3 V for LVCMOS. The serial (I2C and SMBUS) interface can program a variety of functions including the frequencies and output levels of each divider block which can be individually enabled and disabled.
Features
 
  • Flexible Input Reference − 25 MHz Crystal, Oscillator, Single−Ended or Differential
  • Four Independent User−Programmable Clock Frequencies from 25 MHz to 250 MHz
  • Independently Configurable Outputs:
  • Up to Eight LVCMOS Single Ended outputs or,
  • Up to Four Differential LVPECL Outputs or any combination of LVCMOS and LVPECL
  • Flexible Input/Core and Output Power Supply Combinations:
  • VDD (Core) = 3.3 V ±5% or 2.5 V ±5%
  • VDDOn (Outputs) = 3.3 V ±5% or 2.5 V ±5% or 1.8 V ±5% (LVCMOS Only)
  • Independent Power Supply per Output Bank
  • 300 ps max Output Rise and Fall Times, LVPECL
  • 1000 ps max Output Rise and Fall Times, LVCMOS
  • 300 fs maximum RMS Phase Jitter (CLK1:4) Integer-N
  • 1 ps maximum RMS Phase Jitter (CLK4) Frac-N
  • I2C / SMBus Compatible Interface
  • −40°C to +85°C Ambient Operating Temperature
  • 32−Pin QFN, 5 mm x 5 mm
  • Zero ppm Multiplication Error
  • Fractional Divide Ratios for Implementing Arbitrary FEC/Inverse−FEC Ratios
  • This is a Pb−Free Device
Applications   End Products
  • Telecom
  • Networking
  • Ethernet
  • SONET
 
  • Solid State Hard Drive
Evaluation/Development Tool Information
Product Status Compliance Short Description Action
NB3H5150MNGEVB Active
Pb-free
2.5V / 3.3V Low Noise Multi-Rate Clock Generator Evaluation Board
Availability & Samples
Specifications
Product
Status
Compliance
Description
Package
MSL
Container
Budgetary Price/Unit
Type
Case Outline
Type
Temperature
Type
Qty.
NB3H5150MNTXG Active
Pb-free
Halide free
NB3H5150 QFN-32 485CE 1 260 Tape and Reel 1000 Contact Sales Office
Market Leadtime (weeks) : 8 to 12
ON Semiconductor   (2020-09-02 00:00) : 7,000

Product
Description
Pricing ($/Unit)
Compliance
Status
Input Level
Output Level
VS Typ (V)
fin Typ (MHz)
fout Typ (MHz)
tJitter(Cy-Cy) Typ (ps)
tJitter(Period) Typ (ps)
tJitter(Φ) Typ (ps)
tR & tF Typ (ps)
tR & tF Max (ps)
TA Min (°C)
TA Max (°C)
Package Type
NB3H5150MNTXG  
Pb
H
 Active   
Crystal
HCSL
LVDS
LVPECL
TTL
LVCMOS
LVPECL
2.5
3.3
25
25-250
0.22
0.5
200
800
1000
300
-40
85
QFN-32
Case Outlines
485CE   
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Programmable Multi-Rate Clock Generator with Low Noise for Telecom & Networking Applications
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