AMD Artix 7

Non-hardware verified power tree for AMD (Xilinx) Artix 7 FPGA designs.

Efficient Power Delivery Design for AMD Artix 7 FPGAs

Simplify AMD Artix 7 power design with a reference architecture built around power management solutions from onsemi. The power tree combines synchronous buck regulators, low-noise LDOs, and DDR termination regulation. Devices including FAN251015, NCP3136, NCP189, and NCP59801 offer power conversion options with Enable and Power Good functions, providing a practical starting point for developing a multi-rail FPGA power supply.

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Synchronous buck regulator Enable / Power Good. VIN from 4.5V to 18V up to 35A load. 5x6mm PQFN37.

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Synchronous buck regulator Enable / Power Good, PMBUS 1.3.1 Compatible. VIN from 4.5V to 18V up to 15A load. 5x7mm QFN34.

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Synchronous buck regulator w/ Enable / Power Good. VIN from 2.9V to 5.5V up to 6A load. VOUT from 0.6V to 0.84 X VIN3x3mm QFN16.

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500mA LDO, 0.6 to 5V Adjustable VOUT, with Enable / Power Good. WDFNW6_2x2mm

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500mA LDO, 1.8V VOUT, with Enable / Power Good. WDFNW6_2x2mm

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Synchronous buck regulator EN and PG. VIN from 2.9V to 5.5V up to 3A load. 3x3mm QFN16

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Synchronous buck regulator EN and PG. VIN from 2.3V to 5.5V, Vout from 0.3V to 2V, up to 3A load. 1.36x0.432mm WLCSP12

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1A LDO, 1.2V VOUT, with Enable / Power Good WDFNW6_2x2mm

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Source/sink Double Data Rate (DDR1, 2, 3) 3A termination regulator.

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