Dual N-Channel Digital FET 25 V, 0.22 A, 4 Ω

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Overview

These dual N-Channel logic level enhancement mode field effect transistors are produced using a proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for bipolar digital transistors and small signal MOSFETS.

  • This product is general usage and suitable for many different applications.
  • 25 V, 0.22 A continuous, 0.65 A Peak.
  • RDS(ON) = 4 Ω @ VGS= 4.5 V,
  • RDS(ON) = 5 Ω @ VGS= 2.7 V.
  • Very low level gate drive requirements allowing direct operation in 3 V circuits (VGS(th) <1.5 V).
  • Gate-Source Zener for ESD ruggedness (>6kV Human Body Model).
  • Compact industry standard SC70-6 surface mount package.

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CAD Models

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Package Type

Case Outline

MSL Type

MSL Temp (°C)

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ON Target

Channel Polarity

Configuration

V(BR)DSS Min (V)

VGS Max (V)

VGS(th) Max (V)

ID Max (A)

PD Max (W)

RDS(on) Max @ VGS = 2.5 V (mΩ)

RDS(on) Max @ VGS = 4.5 V (mΩ)

RDS(on) Max @ VGS = 10 V (mΩ)

Qg Typ @ VGS = 4.5 V (nC)

Qg Typ @ VGS = 10 V (nC)

Ciss Typ (pF)

Pricing ($/Unit)

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FDG6301N

Active

Pb

A

H

P

SC-88-6 / SC-70-6 / SOT-363-6

1

260

REEL

3000

Y

N-Channel

Dual

25

8

1.5

0.22

0.3

Q1=Q2=5000

Q1=Q2=4000

-

1.64

0.29

9.5

$0.1259

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