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Differential & Single-Ended CMOS, ECL, PECL, CML, LVDS, HSTL, HCSL

ON Semiconductor supplies high frequency single-ended CMOS devices; and devices based on Emitter Coupled Logic (ECL) design techniques, which provides superior jitter and skew. Devices are available in the PureEdge™, GigaComm™, ECLinPS MAX™, ECLinPS Plus™, ECLinPS Lite™, ECLinPS™, MECL-10KH™/MECL-100KH™, and MECL™ families.

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ECLinPS Lite™  (212)
 
ON Semiconductor supplies ECLinPS Lite™ differential clock and logic devices, with throughput speeds up to 3 GHz, based on emitter coupled logic (ECL) design techniques.
Technical Documentation & Design Resources
Application Notes (18) Data Sheets (38)
Simulation Models (83) Package Drawings (5)
 
 
ECLinPS MAX™  (50)
 
ON Semiconductor supplies ECLinPS MAX™ differential clock and logic devices, with throughput speeds up to 6 GHz, based on emitter coupled logic (ECL) design techniques.
Technical Documentation & Design Resources
Application Notes (19) Package Drawings (5)
Simulation Models (17) Evaluation Board Documents (1)
Data Sheets (22) Evaluation/Development Tools (12)
 
 
ECLinPS Plus™  (401)
 
ON Semiconductor supplies ECLinPS Plus™ differential clock and logic devices, with throughput speeds up to 4 GHz, based on emitter coupled logic (ECL) design techniques.
Technical Documentation & Design Resources
Application Notes (22) Package Drawings (12)
Simulation Models (158) Evaluation/Development Tools (5)
Data Sheets (62)  
 
 
ECLinPS™  (143)
 
ON Semiconductor supplies ECLinPS™ differential clock and logic devices, with throughput speeds up to 3 GHz, based on emitter coupled logic (ECL) design techniques.
Technical Documentation & Design Resources
Application Notes (20) Data Sheets (53)
Simulation Models (59) Package Drawings (5)
 
 
GigaComm™  (91)
 
ON Semiconductor supplies GigaComm™ differential clock and logic devices, with throughput speeds up to 12 GHz, based on emitter coupled logic (ECL) design techniques.
Technical Documentation & Design Resources
Application Notes (18) Package Drawings (5)
Simulation Models (31) Evaluation Board Documents (1)
Data Sheets (35) Evaluation/Development Tools (9)
 
 
Low Voltage ECLinPS Plus™  (68)
 
ON Semiconductor supplies Low Voltage ECLinPS Plus™ differential clock and logic devices, with throughput speeds up to 4 GHz, based on emitter coupled logic (ECL) design techniques.
Technical Documentation & Design Resources
Application Notes (20) Package Drawings (13)
Simulation Models (39) Evaluation/Development Tools (1)
Data Sheets (13)  
 
 
Low-Voltage ECLinPS Lite™  (91)
 
ON Semiconductor supplies Low Voltage ECLinPS Lite™ differential clock and logic devices, with throughput speeds up to 3 GHz, based on emitter coupled logic (ECL) design techniques.
Technical Documentation & Design Resources
Application Notes (16) Data Sheets (28)
Simulation Models (41) Package Drawings (6)
 
 
Low-Voltage ECLinPS™  (10)
 
ON Semiconductor supplies Low Voltage ECLinPS™ differential clock and logic devices, with throughput speeds up to 3 GHz, based on emitter coupled logic (ECL) design techniques.
Technical Documentation & Design Resources
Application Notes (15) Data Sheets (5)
Simulation Models (11) Package Drawings (3)
 
 
MECL-10KH™ / MECL-100KH™  (89)
 
ON Semiconductor supplies MECL-10KH™ / MECL-100KH™ differential clock and logic devices, based on emitter coupled logic (ECL) design techniques
Technical Documentation & Design Resources
Application Notes (18) Data Sheets (36)
Simulation Models (29) Package Drawings (5)
 
 
PureEdge™  (124)
 
ON Semiconductor supplies PureEdge™ clock devices, featuring RMS phase jitter as low as 290 fs.
Technical Documentation & Design Resources
Application Notes (6) Package Drawings (3)
Simulation Models (6) Evaluation/Development Tools (2)
Data Sheets (38)  
 
 
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NB3L8504S  2.5 V / 3.3 V 1:4 Differential Input to LVDS Fanout Buffer / Translator

  • 50 ps maximum output skew
  • 1.3 ns maximum propagation delay
  • Accept LVPECL, LVDS, HSTL, HCSL and SSTL

NB3N1900K  NB3W1900L  3.3V 100/133 MHz Differential 1:19 HCSL Clock ZDB/Fanout Buffer for PCIe

  • 19 differential clock output pairs @ 0.7 V
  • Optimized 100 MHz and 133 MHz operating frequencies to meet the next generation PCIe Gen 2/Gen 3 and Intel QPI phase jitter
  • 3.3 V ±5% supply voltage operation