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Data Sheets for  Clock Distribution (Show All)

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Document Title
Document ID/Size
2.5 V, 3.3 V Differential 1:2 HCSL Fanout Buffer NB3L202K/D (137kB) 4
2.5V, 3.3V Differential 1:4 HCSL Fanout Buffer NB3L204K/D (400kB) 1
3.3 V Differential Multipoint Low Voltage M-LVDS Driver Receiver NB3N201S/D (286kB) 1
3.3 V LVPECL/ LVCMOS Programmable Clock Multiplier NB3N3020/D (130kB) 4
3.3 V LVTTL/LVCMOS 2:1 MUX to 4 LVPECL Differential Clock Fanout Buffer Outputs with Clock Enable and Clock Select NB3N853501E/D (217.0kB) 2
3.3 V Xtal Input or LVTTL/LVCMOS 2:1 MUX to 1:4 LVPECL Fanout Buffer   NB3N853531E/D (246.0kB) 7
3.3V Differential 1:10 Fanout Clock and Data Driver with HCSL Outputs   NB3N111K/D (124.0kB) 6
Clock / Data Fanout Buffer, 3.3 V 1:4, with CMOS Outputs NB3N551/D (129.0kB) 4
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