ON Semiconductor’s New PureEdge™ High-Performance, PLL-Based, Clock Generation Devices Deliver 50 Percent Better Phase Jitter than Competitive Products


Best-in-class devices create sub-ps jitter quality clocks that improve timing accuracy, increase design flexibility and lower cost for high-performance telecom, networking, and consumer applications

PHOENIX, Ariz. – March 12, 2007 - ON Semiconductor (Nasdaq: ONNN), a global leader in power semiconductor solutions, today announced the expansion of its high performance clock generation portfolio with the introduction of PureEdge™ - a new family of Phase Lock Loop (PLL) based devices that deliver 50 percent better phase jitter than competitive products.

“Growing our timing business is a key focus for the Standard Products Group,” said Dan Huettl, ON Semiconductor general manager of the Advanced Logic Division. “We’ve leveraged our leadership EClinPS™ design expertise with high-speed, low jitter differential signaling techniques and now have the industry’s best PLL-based low phase noise clock generation technology. With the planned expansion of the PureEdge™ family, we will continue to gain momentum as a key player in the clock generation market space as a provider of solutions for the entire clock tree.” Complete Release

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onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.


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