KB: RSL10 PRAM Availability & Allocation


What is the RSL10 memory map structure, and can the memory allocations for the LPDSP32 be redistributed if LPDSP32 is not being used?


Per the memory map organization described in the RSL10 Hardware Reference Manual available in the RSL10 Documentation Package, the PRAM structure is illustrated below.

The CM3 has 4, 8kB PRAM instances acting as flash overlays for program code and software stack execution. The LPDSP32 also has 4 available instances, which are each 10kB in size for separate DSP algorithm implementations and are also accessible by the CM3. The full mapping of the 10kB PRAM is shown in the DSP_PRAM and DSP_PRAM (remapped) breakdown on the left of the above image. Only the lower section of the DSP_PRAM is visible from the flash overlay on the right.

Unused LPDSP32 memory locations can be reallocated to the CM3 within the firmware and linker configuration scripts for use elsewhere in the user application.

The CM3 views memory locations as 32-bit words, whereas the LPDSP32 views them as 40-bit words due to its 24-bit addressing system relative to 20-bit words. As a result, accessing the LPDSP32 memory locations will appear differently when accessed by the CM3, depending on whether the memory is being used by the LPDSP32, as program memory for the CM3, or as memory overlays by the CM3. Details on this organization are described in the Memory section of the RSL10 Hardware Reference Manual.

Note: the LPDSP32 does not have a boot ROM and relies on the CM3 for its initialization.