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NCV97311MW50AGEVB: The NCV97311A is 3−output regulator.

The NCV97311A is 3−output regulator consisting of a low−Iq battery−connected 3 A 2 MHz non−synchronous switcher and two low−voltage 1.5 A 2 MHz synchronous switchers; all using integrated power transistors. The high−voltage switcher is capable of converting a 4.1 V to 18 V battery input to a 5 V output at a constant 2 MHz switching frequency, delivering up to 3 A. In overvoltage conditions up to 36 V, the switching frequency folds back to 1 MHz; in load dump conditions up to 45 V the regulator shuts down. The output of the battery−connected buck regulator serves as the low voltage input for the 2 synchronous switchers. Each downstream output is adjustable from 1.2 V to 3.3 V, with a 1.5 A current limit and a constant 2 MHz switching frequency. Each switcher has independent enable and reset pins, giving extra power management flexibility. For low−Iq operating mode the low−voltage switchers are disabled, and the standby rail is supplied by a low−Iq LDO (up to 150 mA) with a typical Iq of 30 A. The LDO regulator is in parallel to the high−voltage switcher, and is activated when the switcher is forced in standby mode. All 3 SMPS outputs use peak current mode control with internal slope compensation, internally−set soft−start, battery undervoltage lockout, battery overvoltage protection, cycle−by−cycle current limiting, hiccup mode short−circuit protection and thermal shutdown. An error flag is available for diagnostics
Evaluation/Development Tool Information
Product Status Compliance Short Description Parts Used Action
NCV97311MW50AGEVB Active
Pb-free
The NCV97311A is 3−output regulator. NCV97311MW50AR2G
Technical Documents
Type Document Title Document ID/Size Rev
Eval Board: Manual NCV97311A Evaluation Board User's Manual EVBUM2621/D - 1621 KB  0 
Eval Board: Schematic NCV97311MW50AGEVB Schematic NCV97311MW50AGEVB_SCHEMATIC - 26 KB  0 
Eval Board: BOM NCV97311MW50AGEVB Bill of Materials (ROHS Compliant) NCV97311MW50AGEVB_BOM_ROHS - 118 KB  1 
Eval Board: Gerber NCV97311MW50AGEVB Gerber Layout Files (Zip format) NCV97311MW50AGEVB_GERBER - 143 KB  0 
Eval Board: Test Procedure NCV97311MW50AGEVB Test Procedure NCV97311MW50AGEVB_TEST_PROCEDURE - 213 KB  0 
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