Design Name C:/Users/fg6zcn/Documents/Board Designs/[ONSEC-16-002] NCP81238 USB-PD DFP w QC3.0/Hoogstra - Thermal Relief/fab/USB-PD w QC3_0.brd
Date Thu Nov 09 16:38:25 2017
DRC Error Count Summary
DRC Error Type DRC Error Count
Pad to Pad 7
Etch to Pad 3
Etch to Etch 6
Total DRC Errors 16

Detailed DRC Errors
Constraint Name DRC Marker Location Required Value Actual Value Constraint Source Constraint Source Type Element 1 Element 2
SMD Pin to SMD Pin Spacing (-1600.50 628.00) 5.9 MIL OVERLAP S_E5/N4 NET SPACING CONSTRAINTS Pin "Nt1.1 (Vbat)" Pin "Nt1.2 (Csp1)"
SMD Pin to SMD Pin Spacing (-893.50 612.00) 5.9 MIL OVERLAP S_E5/N4 NET SPACING CONSTRAINTS Pin "Nt3.1 (Vbus)" Pin "Nt3.2 (Csn2)"
SMD Pin to SMD Pin Spacing (-1551.00 612.00) 5.9 MIL 4.5 MIL S_E5/N4 NET SPACING CONSTRAINTS Pin "Nt2.2 (Csn)" Pin "R11.1 (Csn1)"
SMD Pin to SMD Pin Spacing (-1548.50 619.00) 5.9 MIL OVERLAP S_E5/N4 NET SPACING CONSTRAINTS Pin "Nt2.1 (Csn1)" Pin "Nt2.2 (Csn)"
SMD Pin to SMD Pin Spacing (-897.50 597.00) 5.9 MIL OVERLAP S_E5/N4 NET SPACING CONSTRAINTS Pin "Nt4.1 (Csp2)" Pin "Nt4.2 (Csp)"
SMD Pin to SMD Pin Spacing (-896.00 620.00) 5.9 MIL 5.5 MIL S_E5/N4 NET SPACING CONSTRAINTS Pin "Nt3.2 (Csn2)" Pin "R10.1 (Vbus)"
SMD Pin to SMD Pin Spacing (-900.00 590.00) 5.9 MIL 4.5 MIL S_E5/N4 NET SPACING CONSTRAINTS Pin "Nt4.2 (Csp)" Pin "R10.2 (Csp2)"
Line to SMD Pin Spacing (-886.00 597.00) 6 MIL 3 MIL S_E5/N4 NET SPACING CONSTRAINTS Pin "R10.2 (Csp2)" Horizontal Line Segment "Csp Etch/Top"
Line to SMD Pin Spacing (-884.00 612.00) 6 MIL 4 MIL S_E5/N4 NET SPACING CONSTRAINTS Pin "R10.1 (Vbus)" Horizontal Line Segment "Csn2 Etch/Top"
Line to SMD Pin Spacing (-1551.00 619.00) 6 MIL 3 MIL S_E5/N4 NET SPACING CONSTRAINTS Pin "R11.1 (Csn1)" Vertical Line Segment "Csn Etch/Top"
Line to Line Spacing (-1603.00 628.00) 6 MIL 0 MIL S_E5/N4 NET SPACING CONSTRAINTS Vertical Line Segment "Csp1 Etch/Top" Vertical Line Segment "Vbat Etch/Top"
Line to Line Spacing (-907.00 590.00) 6 MIL 1.9 MIL S_E5/N4 NET SPACING CONSTRAINTS Horizontal Line Segment "Csp Etch/Top" Vertical Line Segment "Csp2 Etch/Top"
Line to Line Spacing (-900.00 597.00) 6 MIL 0 MIL S_E5/N4 NET SPACING CONSTRAINTS Horizontal Line Segment "Csp Etch/Top" Odd-angle Line Segment "Csp2 Etch/Top"
Line to Line Spacing (-896.00 612.00) 6 MIL 0 MIL S_E5/N4 NET SPACING CONSTRAINTS Horizontal Line Segment "Csn2 Etch/Top" Horizontal Line Segment "Vbus Etch/Top"
Line to Line Spacing (-897.00 612.00) 6 MIL 0 MIL S_E5/N4 NET SPACING CONSTRAINTS Horizontal Line Segment "Csn2 Etch/Top" Odd-angle Line Segment "Vbus Etch/Top"
Line to Line Spacing (-1551.00 619.00) 6 MIL 0 MIL S_E5/N4 NET SPACING CONSTRAINTS Vertical Line Segment "Csn Etch/Top" Vertical Line Segment "Csn1 Etch/Top"