Detailed DRC Errors
Constraint Name |
DRC Marker Location |
Required Value |
Actual Value |
Constraint Source |
Constraint Source Type |
Element 1 |
Element 2 |
Comment |
SMD Pin to SMD Pin Spacing |
(767.5 1370.0) |
5 MIL |
OVERLAP |
DEFAULT |
NET SPACING CONSTRAINTS |
Pin "Nt4.2 (Csp1)" |
Pin "Nt4.1 (V_In)" |
|
SMD Pin to SMD Pin Spacing |
(777.5 1395.0) |
5 MIL |
OVERLAP |
DEFAULT |
NET SPACING CONSTRAINTS |
Pin "Nt3.1 (N17054709)" |
Pin "Nt3.2 (Csn1)" |
|
SMD Pin to SMD Pin Spacing |
(2032.5 1455.0) |
5 MIL |
OVERLAP |
DEFAULT |
NET SPACING CONSTRAINTS |
Pin "Nt2.1 (Vbus)" |
Pin "Nt2.2 (Csn2)" |
|
SMD Pin to SMD Pin Spacing |
(2032.5 1485.0) |
5 MIL |
OVERLAP |
DEFAULT |
NET SPACING CONSTRAINTS |
Pin "Nt1.2 (Csp2)" |
Pin "Nt1.1 (N17054685)" |
|
Line to Line Spacing |
(2030.0 1485.0) |
5 MIL |
0 MIL |
DEFAULT |
NET SPACING CONSTRAINTS |
Vertical Line Segment "Csp2 Etch/Top" |
Vertical Line Segment "N17054685 Etch/Top" |
|
Line to Line Spacing |
(775.0 1395.0) |
5 MIL |
0 MIL |
DEFAULT |
NET SPACING CONSTRAINTS |
Odd-angle Line Segment "Csn1 Etch/Top" |
Odd-angle Line Segment "N17054709 Etch/Top" |
|
Line to Line Spacing |
(765.0 1370.0) |
5 MIL |
0 MIL |
DEFAULT |
NET SPACING CONSTRAINTS |
Odd-angle Line Segment "V_In Etch/Top" |
Odd-angle Line Segment "Csp1 Etch/Top" |
|
Line to Line Spacing |
(2030.0 1490.5) |
5 MIL |
0 MIL |
DEFAULT |
NET SPACING CONSTRAINTS |
Vertical Line Segment "Csp2 Etch/Top" |
Odd-angle Line Segment "N17054685 Etch/Top" |
|
Line to Line Spacing |
(2030.0 1485.0) |
5 MIL |
0 MIL |
DEFAULT |
NET SPACING CONSTRAINTS |
Odd-angle Line Segment "Csp2 Etch/Top" |
Vertical Line Segment "N17054685 Etch/Top" |
|
Line to Line Spacing |
(2030.0 1490.5) |
5 MIL |
2.5 MIL |
DEFAULT |
NET SPACING CONSTRAINTS |
Odd-angle Line Segment "Csp2 Etch/Top" |
Odd-angle Line Segment "N17054685 Etch/Top" |
|
Line to Line Spacing |
(2026.6 1455.0) |
5 MIL |
0 MIL |
DEFAULT |
NET SPACING CONSTRAINTS |
Horizontal Line Segment "Vbus Etch/Top" |
Odd-angle Line Segment "Csn2 Etch/Top" |
|
Line to Line Spacing |
(2030.0 1455.0) |
5 MIL |
0 MIL |
DEFAULT |
NET SPACING CONSTRAINTS |
Horizontal Line Segment "Vbus Etch/Top" |
Horizontal Line Segment "Csn2 Etch/Top" |
|