NLSF1174: Hex D Flip-Flop with Common Clock and Reset

Datasheet: Hex D Flip-Flop with Common Clock And Reset
Rev. 5 (81.0kB)
Product Overview
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Product Change Notification
This device consists of six flip-flops with common Clock and Reset inputs. Each flip-flop is loaded with a low-tohigh transition; of the Clock input. Reset is asynchronous and active low. All inputs/outputs are standard CMOS compatible.
Features
 
  • Output Drive Compatibility: 10 LSTTL Loads
  • Outpus Directly Interface to CMOS
  • Operation Voltage Range: 2 to 6 V
  • Low Input Current: 1.0 µ A
  • MSL Level 1
  • Chip Complexity: 162 FET
  • Pb-Free Package is Available
Technical Documentation & Design Resources
Data Sheets (1) Package Drawings (1)
Availability & Samples
Specifications
Case Outlines
Product
Status
Compliance
Description
Package
MSL
Container
Budgetary Price/Unit
Type
Case Outline
Type
Temperature
Type
Qty.
NLSF1174MNR2G Active
Pb-free
Halide free
NLSF1174 QFN-16 485G-01 1 260 Tape and Reel 3000 $0.1627
Market Leadtime (weeks) : Contact Factory

Product
Description
Pricing ($/Unit)
Compliance
Status
Type
Channels
VCC Min (V)
VCC Max (V)
tpd Max (ns)
IO Max (mA)
Package Type
NLSF1174MNR2G  
 $0.1627 
Pb
H
 Active   
D-Type
2
2
6
20
4
QFN-16
Case Outlines
485G-01   
Packages
NLSF1174: Hex D Flip-Flop with Common Clock and Reset
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