D Flip-Flops and JK Flip-Flops | MC74ACT109

Dual JK Positive Edge-Triggered Flip-Flop

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Overview

The MC74AC109/74ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J and K inputs together. Asynchronous Inputs:

LOW input to SD (Set) sets Q to HIGH level LOW input to CD (Clear) sets Q to LOW level Clear and Set are independent of clock Simultaneous LOW on CD and SD makes both Q and Q HIGH

  • Outputs Source/Sink 24 mA
  • ACT109 Has TTL Compatible Inputs CD J K CP SD Q Q

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