Non-Iinverting 3-State Buffer



The NL17SHT126 is a single gate noninverting 3state buffer
fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while maintaining
CMOS low power dissipation.
The NL17SHT126 requires the 3state control input (OE) to be set
Low to place the output into the high impedance state.
The device input is compatible with TTLtype input thresholds and
the output has a full 5 V CMOS level output swing. The input
protection circuitry on this device allows overvoltage tolerance on the
input, allowing the device to be used as a logiclevel translator from
3 V CMOS logic to 5 V CMOS Logic or from 1.8 V CMOS logic to
3 V CMOS Logic while operating at the highvoltage power supply.
The NL17SHT126 input structure provides protection when
voltages up to 7 V are applied, regardless of the supply voltage. This
allows the NL17SHT126 to be used to interface 5 V circuits to 3 V
circuits. The output structures also provide protection when
VCC = 0 V. These input and output structures help prevent device
destruction caused by supply voltage input/output voltage mismatch,
battery backup, hot insertion, etc.

  • High Speed: tPD = 3.5 ns (Typ) at VCC = 5 V
  • Low Power Dissipation: ICC = 1 uA (Max) at TA = 25C
  • TTLCompatible Inputs: VIL = 0.8 V; VIH = 2 V
  • CMOSCompatible Outputs: VOH > 0.8 VCC; VOL < 0.1 VCC @Load
  • Power Down Protection Provided on Inputs and Outputs
  • Balanced Propagation Delays
  • Pin and Function Compatible with Other Standard Logic Families
  • These are PbFree Devices


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