PLL Clock Multiplier, 14 MHz - 190 MHz, 3.3 V / 5.0 V

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Overview

The NB3N502 is a clock multiplier device that generates a low jitter,TTL/CMOS level output clock which is a precise multiple of the external input reference clock signal source. The device is a cost efficient replacement for the crystal oscillators commonly used in electronic systems. It accepts a standard fundamental mode crystal or an external reference clock signal. Phase-Locked-Loop (PLL) design techniques are used to produce an output clock up to 190 MHz with a 50% duty cycle. The NB3N502 can be programmed via two select inputs (S0, S1) to provide an output clock (CLKOUT) at one of six different multiples of the input frequency source, and at the same time output the input aligned reference clock signal (REF).

  • Clock Generation
  • Consumer Electronics
  • Industrial
  • Networking and Telecommunication
  • Set Top Box
  • Servers
  • Routers
  • Desktop Computer
  • Clock Output Frequency up to 190 MHz
  • Operating Range: VDD = 3 V to 5.5 V
  • Low Jitter Output of 15 ps One Sigma (RMS)
  • Zero ppm Clock Multiplication Error
  • 45% 55% Duty Cycle
  • Crystal Reference Input Range of 5 MHz to 27 MHz
  • Input Clock Frequency Range of 2 MHz to 50 MHz
  • Full Industrial Temperature Range -40C to 85C

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MSL Type

MSL Temp (°C)

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Input Level

Output Level

VS Typ (V)

fin Typ (MHz)

fout Typ (MHz)

tJitter(Cy-Cy) Typ (ps)

tJitter(Period) Typ (ps)

tJitter(Φ) Typ (ps)

tR & tF Typ (ps)

tR & tF Max (ps)

TA Min (°C)

TA Max (°C)

Reference Price

NB3N502DG

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Active

CAD Model

Pb

A

H

P

SOIC-8

1

260

TUBE

98

Y

Crystal

CMOS

5.5

5-27

14-190

±40

15

-

1000

1000

-40

85

Price N/A

More Details

NB3N502DR2G

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Active

CAD Model

Pb

A

H

P

SOIC-8

1

260

REEL

3000

Y

Crystal

CMOS

5.5

5-27

14-190

±40

15

-

1000

1000

-40

85

Price N/A

More Details

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