Translator, LVTTL / LVCMOS to Differential LVECL

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Overview

The MC100EPT24 is a LVTTL/LVCMOS to differential LVECL translator. Because LVECL levels and LVTTL/LVCMOS levels are used, a -3.3V, +3.3V and ground are required. The small outline 8-lead SOIC package and the single gate of the EPT24 makes it ideal for those applications where space, performance, and low power are at a premium.

  • Level Translator
  • 350ps Typical Propagation Delay
  • Maximum Frequency > 1.0GHz
  • The 100 Series Contains Temperature Compensation
  • Operating Range: VCC= 3.0 V to 3.6 V; VEE= -3.6 V to -3.0 V; GND = 0 V
  • PNP LVTTL Inputs for Minimal Loading
  • Q Output will default HIGH with inputs open
  • Pb-Free Packages are Available

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Product

Status

CAD Models

Compliance

Package Type

Case Outline

MSL Type

MSL Temp (°C)

Container Type

Container Qty.

ON Target

Channels

Input Level

Output Level

VCC Typ (V)

fMax Typ (MHz)

tpd Typ (ns)

tR & tF Max (ps)

Reference Price

MC100EPT24DTG

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Active

CAD Model

Pb

A

H

P

TSSOP-8

3

260

TUBE

100

Y

1

TTL

ECL

3.3

1000

0.53

170

Price N/A

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MC100EPT24MNR4G

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Active

CAD Model

Pb

A

H

P

DFN-8

1

260

REEL

1000

Y

1

CMOS

ECL

3.3

1000

0.53

170

Price N/A

More Details

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