ECL D Flip-Flop with Set and Reset

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Overview

The MC10EL/100EL31 is a D flip-flop with set and reset. The device is functionally equivalent to the E131 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E131 the EL31 is ideally suited for those applications which require the ultimate in AC performance.

Both set and reset inputs are asynchronous, level triggered signals. Data enters the master portion of the flip-flop when clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock.

The 100 Series contains temperature compensation.

  • 475ps Propagation Delay
  • 2.8GHz Toggle Frequency
  • ESD Protection: > 1 KV HBM, > 100 V MM
  • PECL Mode Operating Range: VCC= 4.2 V to 5.7 V with VEE= 0 V
  • NECL Mode Operating Range: VCC= 0 V with VEE= -4.2 V to -5.7 V
  • Internal Input Pulldown Resistors on D, CLK, S, and R
  • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
  • Moisture Sensitivity Level 1
    For Additional Information, see Application Note AND8003/D
  • Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
  • Metastability 125 ps (see Application Note AN1504)
  • Transistor Count = 79 devices
  • Pb-Free Packages are Available

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MSL Type

MSL Temp (°C)

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ON Target

Type

Bits

Input Level

Output Level

VCC Typ (V)

tJitter Typ (ps)

tpd Typ (ns)

tsu Min (ns)

th Min (ns)

trec Typ (ns)

tR & tF Max (ps)

fToggle Typ (MHz)

Reference Price

MC100EL31DG

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Active

CAD Model

Pb

A

H

P

SOIC-8

1

260

TUBE

98

Y

D-Type

1

ECL

ECL

5

1

0.475

0.15

0.25

0.2

350

2800

Price N/A

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