Clock / Data Fanout Buffer, 1:4 AnyLevel™ Input, LVDS, 3.3 V

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Overview

The NB6N14S is a differential 1:4 Clock or Data Receiver and will accept AnyLevel input signals: LVPECL, CML, HCSL, LVCMOS, LVTTL, or LVDS. These signals will be translated to LVDS and four identical copies of Clock or Data will be distributed, operating up to 2.0 GHz or 2.5 Gb/s, respectively. As such, the NB6N14S is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or Data distribution applications. The NB6N14S has a wide input common mode range from GND + 50mV to VCC - 50mV. Combined with the 50-ohm internal termination resistors at the inputs, the NB6N14S is ideal for translating a variety of differential or single-ended Clock or Data signals to 350mV typical LVDS output levels. The NB6N14S is offered in a small 3mm X 3mm 16-QFN package. Application notes, models, and support documentation are available at www.onsemi.com.

  • Base Stations, Networking, Communications, Computing and ATE
  • Maximum Input Clock Frequency > 2.0 GHz
  • Maximum Input Data Rate > 2.5 Gb/s
  • 1 ps Maximum RMS Clock Jitter
  • Typically 10 ps of Data Dependent Jitter
  • 380 ps Typical Propagation Delay
  • 120 ps Typical Rise and Fall Times
  • Pb-Free

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VCC Typ (V)

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NB6N14SMNG

Active

Pb

A

H

P

QFN-16

1

260

TUBE

123

Y

Buffer

1

1:4

TTL

LVDS

3.3

0.5

20

0.45

190

2000

2500

Price N/A

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NB6N14SMNR2G

Active

Pb

A

H

P

QFN-16

1

260

REEL

3000

Y

Buffer

1

1:4

TTL

LVDS

3.3

0.5

20

0.45

190

2000

2500

Price N/A

More Details

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