Clock / Data Fanout Buffer, 1:4 Differential, 3 GHz, 2.5 V / 3.3 V, with LVPECL Outputs

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Overview

The NB6L14 is a 3.0 GHz differential 1:4 LVPECL fanout buffer. The differential inputs incorporate internal 50-ohm termination resistors that are accessed through the VT pin. This feature allows the NB6L14 to accept various logic standards, such as LVPECL, LVCMOS, LVTTL, CML, or LVDS logic levels. The VREF_AC reference output can be used to rebias capacitor-coupled differential or single-ended input signals. The 1:4 fanout design was optimized for low output skew applications. The NB6L14 is a member of the ECLinPS MAX family of high performance clock and data products.

  • Clock / Data Distribution

  • Input Clock Frequency > 3.0 GHz
  • < 20 ps Within Device Output Skew
  • Internal Input Termination Resistors, 50-ohm
  • VREFAC Reference Output

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CAD Models

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Package Type

Case Outline

MSL Type

MSL Temp (°C)

Container Type

Container Qty.

ON Target

Type

Channels

Input / Output Ratio

Input Level

Output Level

VCC Typ (V)

tJitterRMS Typ (ps)

tskew(o-o) Max (ps)

tpd Typ (ns)

tR & tF Max (ps)

fmaxClock Typ (MHz)

fmaxData Typ (Mbps)

Reference Price

NB6L14MNG

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CAD Model

Pb

A

H

P

QFN-16

1

260

TUBE

123

Y

Buffer

1

1:4

CML

LVCMOS

LVDS

LVPECL

LVTTL

LVPECL

3.3

0.2

20

0.37

200

3000

2500

Price N/A

More Details

NB6L14MNR2G

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Active

CAD Model

Pb

A

H

P

QFN-16

1

260

REEL

3000

Y

Buffer

1

1:4

CML

LVCMOS

LVDS

LVPECL

LVTTL

LVPECL

3.3

0.2

20

0.37

200

3000

2500

Price N/A

More Details

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