NB4L16M: Translator, 2.5 V / 3.3 V, 5 Gb/s Multi Level, Clock/Data Input to CML, Driver / Receiver / Buffer, with Internal Termination

Datasheet: Translator, 2.5 V / 3.3 V, 5 Gb/s Multi Level, Clock/Data Input to CML, Driver / Receiver / Buffer, with Internal Termination
Rev. 5 (667kB)
Product Overview
View Reliability Data
View Material Composition
Product Change Notification
The NB4L16M is a differential driver/receiver/buffer/translator which can accept LVPECL, LVDS, CML, LVCMOS/LVTTL and produce 400 mV CML output. The device is housed in a 3x3 mm 16 pin QFN package.
Differential inputs incorporate internal 50 Ω termination resistors and accept LVPECL (Positive ECL), LVTTL/LVCMOS, CML, or LVDS. The differential 16 mA CML output provides matching internal 50 Ω termination, and 400 mV output swing when externally receiver terminated, 50 Ω to VCC. These features provide transmission line termination on chip, at the receiver and driver end, eliminating any use of additional external components.
The VBB, an internally generated voltage supply, is available to this device only. For single ended input configuration, the unused complementary differential input is connected to VBB as a switching reference voltage. The VBB reference output can be used also to re-bias capacitor coupled differential or single ended output signals. For the capacitor coupled input signals, VBB should be connected to the VTD pin and bypassed to ground with a 0.01 µF capacitor. When not used VBB should be left open.
Features
 
  • Maximum Input Clock Frequency > 3.5 GHz Typical
  • Maximum Input Data Frequency > 5 Gb/s Typical
  • 220 ps Typical Propagation Delay
  • 65 ps Typical Rise and Fall Times
  • CML Output with Operating Range: VCC = 2.375 V to 3.8 V with VEE = 0 V
  • CML Output Level (400 mV Peak-to-Peak Output), Differential Output Only
  • 50 Ω Internal Input and Output Termination Resistors
  • Functionally Compatible with Existing 2.5 V / 3.3 V LVEL, LVEP, EP, and SG Devices
  • Pb-Free Packages are Available
Applications
  • OC-3 to OC-48 SONET/SDH Data Buffering
  • 3.2Gb/s XAUI Data Buffering
Evaluation/Development Tool Information
Product Status Compliance Short Description Action
NB4L16MMNEVB
Translator with Internal Termination Evaluation Board
Availability & Samples
Specifications
Interactive Block Diagram
Product
Status
Compliance
Description
Package
MSL
Container
Budgetary Price/Unit
Type
Case Outline
Type
Temperature
Type
Qty.
NB4L16MMNG Active
Pb-free
Halide free
NB4L16M QFN-16 485G-01 1 260 Tube 123 $4.785
NB4L16MMNR2G Active
Pb-free
Halide free
NB4L16M QFN-16 485G-01 1 260 Tape and Reel 3000 $4.785
Market Leadtime (weeks) : 8 to 12
PandS   (2020-09-14 00:00) : <1K
Market Leadtime (weeks) : Contact Factory

Product
Description
Pricing ($/Unit)
Compliance
Status
Type
Channels
Input / Output Ratio
Input Level
Output Level
VCC Typ (V)
tJitterRMS Typ (ps)
tskew(o-o) Max (ps)
tpd Typ (ns)
tR & tF Max (ps)
fmaxClock Typ (MHz)
fmaxData Typ (Mbps)
Package Type
NB4L16MMNG  
 $4.785 
Pb
H
 Active   
Signal Driver
1
1:1
CML
CMOS
ECL
LVDS
TTL
CML
2.5
3.3
0.2
10
0.265
90
3500
5000
QFN-16
NB4L16MMNR2G  
 $4.785 
Pb
H
 Active   
Signal Driver
1
1:1
CML
CMOS
ECL
LVDS
TTL
CML
2.5
3.3
0.2
10
0.265
90
3500
5000
QFN-16
Case Outlines
485G-01   
Application
Diagram - Block
Previously Viewed Products
Clear List

Your request has been submitted for approval.
Please allow 2-5 business days for a response.
You will receive an email when your request is approved.
Request for this document already exists and is waiting for approval.