Name: 3.3 V ECL 1:5 Clock Distribution Chip
Brand: 3.3 V ECL 1:5 Clock Distribution Chip
SKU: MC100LVEL14

3.3 V ECL 1:5 Clock Distribution Chip

Active

Datasheet

Products

Email Sales

Overview

The MC100LVEL14 is a low skew 1:5 clock distribution chip designed explicitly for low skew clock distribution applications. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. The LVEL14 is functionally and pin compatible with the EL14 but is designed to operate in ECL or PECL mode for a voltage supply range of -3.0 V to -3.8 V ( or 3.0 V to 3.8 V).

The LVEL14 features a multiplexed clock input to allow for the distribution of a lower speed scan or test clock along with the high speed system clock. When LOW (or left open and pulled LOW by the input pulldown resistor) the SEL pin will select the differential clock input.

The common enable (EN) is synchronous so that the outputs will only be enabled/disabled when they are already in the LOW state. This avoids any chance of generating a runt clock pulse when the device is enabled/disabled as can happen with an asynchronous control. The internal flip flop is clocked on the falling edge of the input clock, therefore all associated specification limits are referenced to the negative edge of the clock input.

The V_BB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to V_BB as a switching reference voltage. V_BB may also rebias AC coupled inputs. When used, decouple V_BB and V_CC via a 0.01 5F capacitor and limit current sourcing or sinking to 0.5 mA. When not used, V_BB should be left open.

50 ps Output-to-Output Skew
Synchronous Enable/Disable
Multiplexed Clock Input
ESD Protection: >2 KV HBM
The 100 Series Contains Temperature Compensation
PECL Mode Operating Range: V_CC = 3.0 V to 3.8 V
with V_EE = 0 V
NECL Mode Operating Range: V_CC = 0 V
with V_EE = -3.0 V to -3.8 V
Internal Input Pulldown Resistors on CLK
Q Output will Default LOW with Inputs Open or at V_EE
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Flammability Rating: UL-94 code V-0 @ 1/8",
Oxygen Index 28 to 34
Transistor Count = 303 devices

Tools and Resources

Product services, tools and other useful resources related to MC100LVEL14

CAD Model

Material Composition

Product Change Notification

Reliability Data

Product List

If you wish to buy products or product samples, please log in to your onsemi account.

Products:

Sort by

Product Groups:

┗

Orderable Parts:

Product

Status

CAD Models

Compliance

Package Type

Case Outline

MSL Type

MSL Temp (°C)

Container Type

Container Qty.

Type

Channels

Input / Output Ratio

Input Level

Output Level

V_CC Typ (V)

t_JitterRMS Typ (ps)

t_skew(o-o) Max (ps)

t_pd Typ (ns)

t_R & t_F Max (ps)

f_maxClock Typ (MHz)

f_maxData Typ (Mbps)

Reference Price

MC100LVEL14DWR2G

Active

SOIC-20W

751D-05

260

REEL

1000

Buffer

2:1:5

LVDS

ECL

3.3

0.2

0.68

500

1000

Price N/A

Support on the go

Find and compare products, get support and connect with onsemi sales team.

Contact Sales

Product Number:

Distributor		Stock	BUY

Product Technology

Equivalent Device-Hours

MTBF/MTTF in Hours

FITS

MOSAIC

476668904

Drivers & Fanout Buffers | MC100LVEL14

Overview

Feature

Tools and Resources

Product List

Support on the go