3.3V LVDS High Speed Differential Driver/Receiver

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Overview

This driver and receiver pair are designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signals to LVDS levels with a typical differential output swing of 350mV and the receiver translates LVDS signals, with a typical differential input threshold of 100mV, into LVTTL levels. LVDS technology provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed clock or data transfer.

  • Wireless Infrastructure
  • Storage & Peripherals
  • Industrial and Medical Equipment
  • Telecom Infrastructure

  • Printers
  • Machine Vision Systems
  • Medical Imaging Devices

  • Flow-through pinout simplifies PCB layout
  • Low power dissipation
  • Power-Off protection
  • Greater than 400Mbs data rate
  • 3.3V power supply operation
  • 0.5ns maximum differential pulse skew
  • 2.5ns maximum propagation delay
  • 100mV receiver input sensitivity
  • Fail safe protection open-circuit, shorted and terminated conditions
  • Meets or exceeds the TIA/EIA-644 LVDS standard
  • 14-Lead SOIC and TSSOP packages save space

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Product

Status

CAD Models

Compliance

Package Type

Case Outline

MSL Type

MSL Temp (°C)

Container Type

Container Qty.

ON Target

Type

Channels

Input / Output Ratio

Input Level

Output Level

VCC Typ (V)

tJitterRMS Typ (ps)

tskew(o-o) Max (ps)

tpd Typ (ns)

tR & tF Max (ps)

fmaxClock Typ (MHz)

fmaxData Typ (Mbps)

Reference Price

FIN1019MTCX

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CAD Model

Pb

A

H

P

TSSOP-14 WB

1

260

REEL

2500

N

Signal Driver

2

1:1

LVDS

LVTTL

LVDS

LVTTL

3.3

~NA~

0.5

2.5

500

~NA~

400

$0.8139

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