Drivers & Fanout Buffers | FIN1017

3.3V LVDS 1-Bit High Speed Differential Driver

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Overview

This single driver is designed for high-speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which provides low EMI at ultra-low power dissipation even at high frequencies. This device is ideal for high-speed transfer of clock or data. The FIN1017 can be paired with its companion receiver, the FIN1018, or with any other LVDS receiver.

  • Media Tablets
  • Storage & Peripherals
  • Mobile Handsets
  • Wireless LAN Card & Broadband Access
  • PMP/MP3 Players
  • Greater than 600Mbs data rate
  • 3.3V power supply operation
  • 0.5ns maximum differential pulse skew
  • 1.5ns maximum propagation delay
  • Low power dissipation
  • Power-Off protection
  • Meets or exceeds the TIA/EIA-644 LVDS standard
  • Flow-through pinout simplifies PCB layout
  • 8-Lead SOIC and US8 packages save space

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Input / Output Ratio

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Output Level

VCC Typ (V)

tJitterRMS Typ (ps)

tskew(o-o) Max (ps)

tpd Typ (ns)

tR & tF Max (ps)

fmaxClock Typ (MHz)

fmaxData Typ (Mbps)

Reference Price

FIN1017MX

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Last Shipments

CAD Model

Pb

A

H

P

SOIC-8

751EB

1

260

REEL

2500

N

Signal Driver

1

1:1

LVTTL

LVDS

3.3

-

-

-

-

-

-

Price N/A

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