3.3 V ECL ÷·2, ÷·4, ÷·8 Divider

Favorite

Overview

The MC100LVEL34 is a low skew 2, 4, 8 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The VBB pin, an internally generated voltage supply, is available to this device only. For single−ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 F capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open.
The common enable (EN bar) is synchronous so that the internal dividers will only be enabled/disabled when the internal clock is already in the LOW state. This avoids any chance of generating a runt clock pulse on the internal clock when the device is enabled/disabled as can happen with an asynchronous control. An internal runt pulse
could lead to losing synchronization between the internal divider stages. The internal enable flip-flop is clocked on the falling edge of the input clock; therefore, all associated specification limits are referenced to the negative edge of the clock input.
Upon start−up, the internal flip-flops will attain a random state; the master reset (MR) input allows for the synchronization of the internaldividers, as well as multiple LVEL34s in a system.

  • 50 ps Typical Output-to-Output Skew
  • Synchronous Enable/Disable
  • Master Reset for Synchronization
  • 1.5 GHz Toggle Frequency
  • The 100 Series Contains Temperature Compensation.
  • PECL Mode Operating Range: VCC = 3.0 V to 3.8 V with VEE = 0V
  • NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -3.8 V
  • Open Input Default State
  • LVDS Input Compatible
  • Pb-Free Packages are Available

Product List

If you wish to buy products or product samples, please log in to your onsemi account.

Search

Close Search

Products:

2

Share

Product Groups:

Orderable Parts:

2

Product

Status

CAD Models

Compliance

Package Type

Case Outline

MSL Type

MSL Temp (°C)

Container Type

Container Qty.

ON Target

Type

Input Level

Output Level

VCC Typ (V)

fMax Typ (MHz)

tpd Typ (ns)

tR & tF Max (ps)

Reference Price

MC100LVEL34DR2G

Loading...

Active

CAD Model

Pb

A

H

P

SOIC-16

1

260

REEL

2500

Y

Divider

LVDS

ECL

3.3

1500

0.7

400

Price N/A

More Details

MC100LVEL34DTR2G

Loading...

Active

CAD Model

Pb

A

H

P

TSSOP-16

1

260

REEL

2500

Y

Divider

LVDS

ECL

3.3

1500

0.7

400

Price N/A

More Details

Show More

1-25 of 25

Products per page

Jump to :