Analog Switches | FSA646A

2:1 MIPI D-PHY (4.5Gbps) 4-Data-Lane & C-PHY (3.5Gsps) 3-Data-Lane Switch

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Overview

The FSA646A can be configured as a four−data−lane MIPI, D−PHY switch or a three−data−lane MIPI, C−PHY switch. This single−pole, double−throw (SPDT) switch is optimized for switching between two high−speed or low−power MIPI sources. The FSA646A is designed for the MIPI specification and allows connection to a CSI or DSI module.

  • Cellular Phones, Smart Phones
  • Tablets
  • Laptops
  • Displays

  • Switch Type: SPDT(10x)
  • Signal Types:
  • MIPI, D-PHY
  • VCC: 1.5 to 5.0 V
  • Input Signals: 0 to 1.3 V
  • RON:
  • 6 Ώ Typical HS MIPI
  • 6 Ώ Typical LP MIPI
  • △RON: 0.1 Ώ Typical LP & HS MIPI
  • RON_FLAT: 0.9 Ω Typical LP & HS MIPI
  • ICCZ:1 µA Maximum
  • ICC: 30 µA Typical
  • OIRR: -24 dB Typical
  • Bandwidth: 4.7 GHz Minimum
  • CON: 1.4 pF Typical
  • Xtalk: -30 dB Typical
  • Skew (P), Skew (O): 6 ps Typical

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Reliability Data

Die Related Summary Data

Device: FSA646AUCX

Equivalent to wafer fab process: CMOS SUB

Product Technology

Product Technology

Equivalent Device-Hours

MTBF/MTTF in Hours

FITS

CMOS SUB

2

920154574

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Re-calculate Data

Data is based on the following assumptions.

Note: The temperature and confidence level may be adjusted to your requirements.

Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)

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