30V Asymmetric Dual N-Channel PowerTrench® Power Clip MOSFET

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Overview

This device includes two specialized N-Channel MOSFETs in a dual package. The switch node has been internally connected to enable easy placement and routing of synchronous buck converters. The control MOSFET (Q1) and synchronous SyncFET™ (Q2) have been designed to provide optimal power efficiency.

  • Computing
  • Communications
  • General Purpose Point of Load

  • Q1 N-Channel
    Max. RDS(on) = 5.0 mΩ at VGS = 10 V, ID = 17 A
    Max. RDS(on) = 6.5 mΩ at VGS = 10 V, ID = 17 A
  • Q2 N-Channel
    Max. RDS(on) = 1.6 mΩ at VGS = 10 V, ID = 32 A
    Max. RDS(on) = 2.0 mΩ at VGS = 4.5 V, ID = 28 A
  • Low Inductance Packaging Shortens Rise/Fall Times, Resulting in Lower Switching Losses
  • MOSFET Integration Enables Optimum Layout for Lower Circuit Inductance and Reduced Switch Node Ringing
  • RoHS Compliant

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Product

Status

CAD Models

Compliance

Package Type

Case Outline

MSL Type

MSL Temp (°C)

Container Type

Container Qty.

ON Target

Channel Polarity

Silicon Family

Package Name

Type

Gate Level

Wide SOA Mosfets

Configuration

OPN in older Technology

V(BR)DSS Min (V)

RDS(on) Max @ VGS = 10 V (mΩ)

Vgs (V)

Vgs(th) Max (V)

ID Max (A)

PD Max (W)

RDS(on) Max @ VGS = 2.5 V (mΩ)

RDS(on) Max @ VGS = 4.5 V (mΩ)

Qg Typ @ VGS = 4.5 V (nC)

Qg Typ @ VGS = 10 V (nC)

Ciss Typ (pF)

Qgd Typ @ VGS = 4.5 V (nC)

Qrr Typ (nC)

Coss Typ (pF)

Crss Typ (pF)

Reference Price

FDPC5018SG

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Active

CAD Model

Pb

A

H

P

PQFN-8

1

260

REEL

3000

Y

N-Channel

PowerTrench® T1

Power 56 (SO-8FL)

Low-Medium Voltage

Logic

0

Dual

0

30

Q1: 5.0, Q2: 1.6

12

3

Q1= 56.0, Q2: 109.0

Q1: 23, Q2: 29

-

Q1: 6.5, Q2: 2.0

30

28

4593

-

-

-

-

$0.6325

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