There are some questions on Fig 27 Wakeup Interrupts of RSL10 hardware reference…
- What is time width between slot IRQ and wake-up IRQ ? Why does the clock need correction?
- As to clock correction latency, could you describe more clearly how to handle the clock correction latency or which On-semi document explains the detailed handling.
- Whether there is an IRQ to synch the connection interval starting. May the connection interval starting trigger an IRQ.
- Where may we read two continuous connection intervals’ time to know time difference and then do correction? Thanks.