RSL10 External XTAL clock in AOUT pin

Hello gurus,

My system uses 48 Mhz, crystal oscillator to drive the external clock pin of RSL10. We would like to measure the frequency observed in EXT clk. (using oscilloscope )

From the data sheet we came to know that if we use “ACS->AOUT_CTRL = AOUT_XTAL_CLK;” we shold be able to bring our XTAL frequecy to AOUT pin pad. But nothing is observed in the pin. (whereas we were able to bring SYSCLK to DIO pin without any issues ) .

Please advise if i am missing something or doing some thing wrong? The init function used is put in below link “RSL10 I2C issues - #15 by akrece

with
thanks and regards
arun

@akrece

You can enable the XTAL32 and then use AOUT - the analog test output signal.

/* Enable XTAL32K oscillator amplitude control

  • Set XTAL32K load capacitance to 0x38: 22.4 pF
  • Enable XTAL32K oscillator */
    ACS->XTAL32K_CTRL =
    (XTAL32K_XIN_CAP_BYPASS_DISABLE |
    XTAL32K_AMPL_CTRL_ENABLE |
    XTAL32K_NOT_FORCE_READY |
    (XTAL32K_CLOAD_TRIM_VALUE << ACS_XTAL32K_CTRL_CLOAD_TRIM_Pos) |
    (XTAL32K_ITRIM_VALUE << ACS_XTAL32K_CTRL_ITRIM_Pos) |
    XTAL32K_IBOOST_DISABLE |
    XTAL32K_ENABLE);

/* Wait for XTAL32K oscillator to be ready */
while (ACS_XTAL32K_CTRL->READY_ALIAS != XTAL32K_OK_BITBAND);
ACS->AOUT_CTRL = AOUT_VSSA |AOUT_XTAL_CLK ;

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1 Like

Thanks a lot @martin.bela … There is only one suggestion, my clock is connected to 48 Mhz XTAL pin (not 32K XTAL pin) ie XTAL48_P (A8) and XTAL48_N (A6).

is this code u have given directly convertible to that pin ?

@akrece

For 48MHz crystal, you can power up the RF system, enable the oscillator, wait for it to be ready, then switch the SYSCLK source to the 48MHz oscillator, then finally configure a DIO to output SYSCLK:

    /* Configure the current trim settings for VCC, VDDA */
    ACS_VCC_CTRL->ICH_TRIM_BYTE  = VCC_ICHTRIM_16MA_BYTE;
    ACS_VDDA_CP_CTRL->PTRIM_BYTE = VDDA_PTRIM_16MA_BYTE;

    /* Start 48 MHz XTAL oscillator */
    ACS_VDDRF_CTRL->ENABLE_ALIAS = VDDRF_ENABLE_BITBAND;
    ACS_VDDRF_CTRL->CLAMP_ALIAS  = VDDRF_DISABLE_HIZ_BITBAND;

    /* Wait until VDDRF supply has powered up */
    while (ACS_VDDRF_CTRL->READY_ALIAS != VDDRF_READY_BITBAND);

    /* Disable RF TX power amplifier supply voltage and
    * connect the switched output to VDDRF regulator */
    ACS_VDDPA_CTRL->ENABLE_ALIAS = VDDPA_DISABLE_BITBAND;
    ACS_VDDPA_CTRL->VDDPA_SW_CTRL_ALIAS    = VDDPA_SW_VDDRF_BITBAND;

    /* Enable RF power switches */
    SYSCTRL_RF_POWER_CFG->RF_POWER_ALIAS   = RF_POWER_ENABLE_BITBAND;

    /* Remove RF isolation */
    SYSCTRL_RF_ACCESS_CFG->RF_ACCESS_ALIAS = RF_ACCESS_ENABLE_BITBAND;

    /* Start the 48 MHz oscillator without changing the other register bits */
    RF->XTAL_CTRL = ((RF->XTAL_CTRL & ~XTAL_CTRL_DISABLE_OSCILLATOR) |
                     XTAL_CTRL_REG_VALUE_SEL_INTERNAL);

    /* Enable the 48 MHz oscillator divider using the desired prescale value */
    RF_REG2F->CK_DIV_1_6_CK_DIV_1_6_BYTE = CK_DIV_1_6_PRESCALE_6_BYTE;

    /* Wait until 48 MHz oscillator is started */
    while (RF_REG39->ANALOG_INFO_CLK_DIG_READY_ALIAS !=
           ANALOG_INFO_CLK_DIG_READY_BITBAND);

    /* Switch to (divided 48 MHz) oscillator clock */
    Sys_Clocks_SystemClkConfig(JTCK_PRESCALE_1   |
                               EXTCLK_PRESCALE_1 |
                               SYSCLK_CLKSRC_RFCLK);

    /* Configure DIOs */
    Sys_DIO_Config(SYSCLK_DIO_NUM, DIO_MODE_SYSCLK);

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