Thanks for you advice. Now the registers are as follows: DIG_RESET_STATUS = 0x1 and ACS_RESET_STATUS = 0x800, which means that the reset seems to have occurred due to a VDDM reset (VDDM is supply voltage for memory functions). From the manual, I read that this can occur if the VDDM falls below a threshold. Would that because I don’t explicitly specify the trim value of the VDDM in low-power mode?
If instead of:
bool powerModeEnterd = BLE_Power_Mode_Enter(&standby_mode_env, POWER_MODE_STANDBY);,
/* Update wake-up configuration and control registers */
ACS->WAKEUP_CFG = WAKEUP_DELAY_8 |
/* Update wake-up control and clear previous wake-up events */
ACS->WAKEUP_CTRL = WAKEUP_DCDC_OVERLOAD_CLEAR |
Then a reset does not occur, and the codes resumes operation after a ‘wakeup due to the DIO0 pad’ (which is also strange as I disabled wakeup due to DIO0 pad). Regarding the timing information in syos_trace, the wake up occurs already ±24 ms after sending it in low-power mode (although I don’t know if this is reasonable to look at, as in standby mode, the timers might be disabled, so the board has no knowledge of time anymore?)
__set_PRIMASK instead of
GLOBAL_INT_* did not make a difference. In the sample code ‘peripheral_server_standby’ of RSL10, I see that they use also
GLOBAL_INT_* before and after the low power mode.