Introduction
RSL15 provides AOUT (Analog Test Output) to access internal analog and digital signals for test and debug purpose.
The AOUT is available on ALL GPIOs. This makes much more convenient than RSL10 which has only a dedicated Test pin.
Here is an example to use AOUT (GPIO1) to access internal VCC voltage
Step 1:
/* pre-define parameters*/
#define AOUT_GPIO 1 // Define GPIO1 for AOUT
#define AOUT_ENABLE_DELAY SystemCoreClock /100 // Define delay for 10ms
Step 2:
/* Initialization for using AOUT on a GPIO (AOUT_GPIO) */
GPIO->CFG[AOUT_GPIO] = GPIO_WEAK_PULL_DOWN;
Sys_Delay(AOUT_ENABLE_DELAY);
GPIO->CFG[AOUT_GPIO] = GPIO_MODE_DISABLE | GPIO_NO_PULL;
ACS->AOUT_CTRL = AOUT_VSSA |
SEL_AOUT_TO_GPIO |
(AOUT_GPIO << ACS_AOUT_CTRL_AOUT_TO_GPIO_Pos);
NOTE:
Extra care is to be taken when using AOUT on a GPIO, if not, the device can be damaged.
We ensure there is no voltage on the pin and then no pullup/pulldown resistors.
We need discharge any voltage from previous setting before using AOUT on a GPIO.
Step 3:
/* Select VCC for AOUT and we can monitor VCC at AOUT_GPIO */
ACS->AOUT_CTRL = **AOUT_VCC**|
SEL_AOUT_TO_GPIO |
(AOUT_GPIO << ACS_AOUT_CTRL_AOUT_TO_GPIO_Pos);
Tips:
Since ACS registers are active in sleep mode, the setting could be kept in sleep mode.
We could use AOUT (GPIO) to access internal analog and digital signals in sleep mode period for debug.
For example: monitor VDDM, VDDM_ready signals etc.
How many internal signals can be accessed for AOUT?
Answer: There are 64 signals.
| ACS_AOUT_CTRL[5:0] | |||
|---|---|---|---|
| TEST_AOUT | AOUT_VSSA | AOUT grounded | 0x0* |
| AOUT_VCC | VCC | 0x1 | |
| AOUT_IPTAT | Band-gap ptat pmos current source | 0x2 | |
| AOUT_IVBE | Band-gap vbe ptat current source | 0x3 | |
| AOUT_IREF_1U | Band-gap 1uA pmos current source | 0x4 | |
| AOUT_IREF_50N | Band-gap 50nA pmos current source | 0x5 | |
| AOUT_IREF_10N | Band-gap 10nA nmos current source | 0x6 | |
| AOUT_VREG_BG | Band-gap regulated supply voltage / flash reference voltage | 0x7 | |
| AOUT_VREF_0P75V | Band-gap reference voltage 0p75V | 0x8 | |
| AOUT_VREF_0P75V_buf | Band-gap reference voltage 0p75V after internal buffer | 0x9 | |
| AOUT_VREF_0P67V | Band-gap reference voltage 0p67V | 0xA | |
| AOUT_WEDAC | Band-gap WEDAC reference voltage | 0xB | |
| AOUT_TEMP_SENSOR_VPTAT | Temperature sensor output voltage | 0xC | |
| AOUT_NOT_USED | UNUSED Signal | 0xD | |
| AOUT_LSAD_INTERNAL_VREF | LSAD internal vref | 0xE | |
| AOUT_THERMISTOR_CURRENT | Thermistor current | 0xF | |
| AOUT_IREF_1N_OUTPUT | PMU PTAT iref current source | 0x10 | |
| AOUT_VDDACS_OUTPUT | PMU vddacs voltage | 0x11 | |
| AOUT_RC_INTENAL_SUPPLY | RC intenal supply | 0x12 | |
| AOUT_RC32_INTENAL_SUPPLY | RC32 intenal supply | 0x13 | |
| AOUT_VDDA_SW | Vdda switch voltage | 0x14 | |
| AOUT_VDDSYN_SW | Vddsyn switch voltage | 0x15 | |
| AOUT_VDDRF_SW | Vddrf switch voltage | 0x16 | |
| AOUT_VDDT | VDDT switch voltage | 0x17 | |
| AOUT_VDDCCAO | VDDCCAO switch voltage | 0x18 | |
| AOUT_VDDSENSOR | VDDSENSOR switch voltage | 0x19 | |
| AOUT_VDDM | VDDM voltage output | 0x1A | |
| AOUT_VDDC | VDDC voltage output | 0x1B | |
| AOUT_VDDPA | VDDPA voltage output | 0x1C | |
| AOUT_VDDPA_ISENSE | VDDPA current sensing | 0x1D | |
| AOUT_FLASH0_TM0 | Instance Flash 0 TM0 connected to AOUT | 0x1E | |
| AOUT_VDDM_DRAM7_C | VDDM DRAM7 Core supply | 0x1F | |
| AOUT_VDDA | VDDA voltage output | 0x20 | |
| AOUT_VDDRF | VDDRF voltage output | 0x21 | |
| AOUT_VDDC_RF | VDDC RF power island supply | 0x22 | |
| AOUT_VDDFLASH | VDDFLASH voltage output | 0x23 | |
| AOUT_HIZ | HIZ (measure leakage) | 0x24 | |
| AOUT_RC32_IBP_12N_NTC | RC32 NTC current | 0x25 | |
| AOUT_VDDM_DRAM7_P | VDDM DRAM7 Peripheral supply | 0x26 | |
| AOUT_VDDC_CC | VDDC CryptoCell power island supply | 0x27 | |
| AOUT_VDDC_BB | VDDC Baseband power island supply | 0x28 | |
| DOUT_SP1 | Digital spare 1 | 0x29 | |
| DOUT_SP2 | Digital spare 2 | 0x2A | |
| DOUT_BG_READY | Band-gap ready signal | 0x2B | |
| DOUT_VDDRF_READY | vddrf ready signal | 0x2C | |
| DOUT_VDDC_READY | Vddc ready signal | 0x2D | |
| DOUT_VDDM_READY | Vddm ready signal | 0x2E | |
| DOUT_VDDCP_READY | vddcp ready signal | 0x2F | |
| DOUT_SP3 | Digital spare 3 | 0x30 | |
| DOUT_VDDFLASH_READY | vddflash ready signal | 0x31 | |
| DOUT_CLK_PRESENT | Clock present from clock detector | 0x32 | |
| DOUT_XTAL_OK | Xtal ok | 0x33 | |
| DOUT_XTAL_CLK | Xtal clock | 0x34 | |
| DOUT_RC32_CLK | RC 32kHz clock | 0x35 | |
| DOUT_DCDC_ACTIVATED | DC-DC converter activated signal | 0x36 | |
| DOUT_DCDC_OVERLOAD | DC-DC converter overload signal | 0x37 | |
| DOUT_DCDC_VCC_READY | DC-DC converter vcc ready signal | 0x38 | |
| DOUT_SP4 | Digital spare 4 | 0x39 | |
| DOUT_SP5 | Digital spare 5 | 0x3A | |
| DOUT_SP6 | Digital spare 6 | 0x3B | |
| DOUT_STANDBY_CLK | Standby clock | 0x3C | |
| DOUT_SAR_COMPARATOR | Comparator output of the SAR | 0x3D | |
| DOUT_CP_CLK | Charge Pump clock | 0x3E | |
| DOUT_ACOMP_OUT | Analog Comparator output signal | 0x3F |