KB: Impacts of RAM Retention on RSL10 Sleep Current

[RSL10 - Knowledge Base]


When leveraging the industry-leading ultra-low-power sleep mode of RSL10, there are a number of internal device settings that can impact the current consumption of the device. One of the most impactful factors is the amount of RAM that is set to retention mode during sleep operations. The table below focuses on the second step current consumption, which provides a more accurate representation of the long-term sleep current draw.

Using our ‘sleep_RAM_retention’ sample firmware as a baseline, what additional current consumption can be expected as we add additional RAM instances to the retention list?


The first thing to consider, when looking at the measurement values below, is that the sleep mode current consumption consists of two separate behaviors at varied times during execution. First is the current consumption that is measured while the power supply capacitors on the device are being drained (while also powering the device). Second is the current consumption pulled directly from VBAT after these capacitors have fully discharged.

Please consider these assumptions when evaluating the values below:

  • All of these measurements were done at 3V VBAT (other VBAT values will have different step sizes)
  • The first step consumptions values will generally remain static (~60nA @ 3V, RTC enabled) but the length of this step is dependent on the RAM retained
  • All of these measurements were performed using our ‘sleep_RAM_retention’ sample firmware, with only changes to the RAM retention settings and the RTC timer duration (set to 20s intervals)
RAM Retained First Step (Duration) Second Step (Current) Second Step (Duration) Total (Duration)
0 kB 9.6s 116nA 10.4s 20s
8 kB 5.8s 140nA 14.2s 20s
16 kB 4.9s 159nA 15.1s 20s
24 kB 4.0s 181nA 16.0s 20s

From this information we can conclude that at 3V VBAT, with RTC enabled, you can expect to see a reduction to the first step duration as the additional memory retention will drain the capacitors more quickly, and an increase to the second step current consumption of ~20nA per 8kB.

Note: This first and second step cycle will repeat on every instance of wakeup and sleep that occurs.

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Hi Brandon,

thanks for this article. Just to make sure I understood well, the first step is right after entering sleep mode, where the only circuitry that is still on, drains current from the supply capacitors instead of from VBAT, right?

The supply capacitors, are the external ones recommended by the datasheet?

Hi @satov,

Your conclusion is correct. The first current level seen immediately after switching to sleep mode is caused by the device running almost entirely from the supply capacitors.

These tests were run on our RSL10 SiP Evaluation Board, so the suggested capacitors on the datasheet should behave in a very similar way, if not identically.

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