KB: How to enable DIO13,DIO14 and DIO15 for normal DIO function?

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#1

How to enable DIO13,DIO14 and DIO15 for normal DIO function?

When RSL10 power on, the DIO13, DIO14 and DIO15 are configured for JTAG (SWJ-DP debug port interface to implement a 4- or 5-wire JTAG interface).

  • DIO13 configured as JNTRST (5-wire JTAG interface only)
  • DIO14 configured as JTDI
  • DIO15 configured as JTDO

The following table shows 4- and 5-wire JTAG and SWD interfaces:

image
image1868×951 33.9 KB

However, we normally recommend using JTAG SWD for programming and debugging, which only use RSL10 TMS and TCLK pins.

How can we enable these 3 DIO pins (DIO13, DIO14 and DIO15) for normal DIO functions like other DIOs?

Please use the following code:

// This is for DIO14/DIO15
DIO_JTAG_SW_PAD_CFG->CM3_JTAG_DATA_EN_ALIAS = CM3_JTAG_DATA_DISABLED_BITBAND;

//This is for DIO13
DIO_JTAG_SW_PAD_CFG->CM3_JTAG_TRST_EN_ALIAS = CM3_JTAG_TRST_DISABLED_BITBAND;

NOTE: If you are using CMSIS, you also have an option to configure in this way.

You could also navigate to the RTE_Device.h file within the Project Explorer (RTE ==> Device ==> RSL10 ==> RTE_Device.h) and then right click, open with the CMSIS Configuration Wizard, and change the GPIO settings as following:

image

Make sure you enable “JTAG SW PAD configuration enable” and disable “JTAG data enable” as well as “TRST enable”.

#2

Hey Larry,

you could also navigate to the RTE_Device.h file within your project explorer (RTE ==> Device ==> RSL10 ==> RTE_Device.h) and then right click, open with CMSIS Configuration Wizard and change the GPIO settings as following:

image

Make sure you enable “JTAG SW PAD configuration enable” and disable “JTAG data enable” as well as “TRST enable”.

Hope this helps!
Bruno

#3

Hi Bruno,
Good point!. Thanks.

#5

I ran into the same problem, because I have the need for 16 GPIOs. So I followed your advice and changed the configuration for the JTAG SW PAD as shown. But I can still not use the three pins as GPIOs. Neither do they work as PWM outputs nor do they follow any Sys_GPIO_Set_Low() or Sys_GPIO_Set_High() calls.

I have them enabled and configured above in the Wizard as outputs - but no success.

Any idea?

regards
Michael

#6

Hi Michael,
I have verified this in blinky sample by using my configuration.
It works at DIO14.

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image976×688 45.1 KB

Please double check on your side.

Larry

#7

Hi Larry,

thanks for the quick answer. You are right. When I include the two DIO_JTAG_SW_PAD_CFG settings in my C code, it works!! This is great. I tried it only with the RTE_Device.h settings.

Thanks for your help
Michael

#8

You can use this pin for nominal functionality.You should disable DIO_JTAG_SW_PAD_CFG register bit field CM3_JTAG_DATA_EN and CM3_JTAG_TRST_EN. If you want to 4 and 5 wire jtag you can already use this 3 pins as jtag pins in default. You can set up this pin for nominaly functionalty DIO config if you insert below code line ;

“Sys_DIO_Config(14,DIO_MODE_GPIO_OUT_0);”

I said after solutions because default config never goes to break.So that is why we have to insert this lines (maybe in another situation it could be);

DIO_JTAG_SW_PAD_CFG->CM3_JTAG_DATA_EN_ALIAS = 0;
DIO_JTAG_SW_PAD_CFG->CM3_JTAG_TRST_EN_ALIAS = 0;