I2S/PCM for RSL10

Is there a hardware and firmware example for I2S/PCM interfacing to the RSL10?

@thomas
Please refer to our knowledge base thread regarding I2S/PCM.

KB: I2S Digital Audio Standard using the RSL10 PCM Interface

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Dear,

Not lots info there, any more aviable? Or examples.

@thomas
We have no standalone PCM/I2S sample applications, but the ‘remote_mic_tx_raw’ sample application allows users to select PCM/I2S as the input interface.

If you configure the ‘’ INPUT_INTRF ’ variable within ‘’ app.h ’ of the ‘’ remote_mic_rx_raw ’ sample firmware with the ‘’ PCM_RX_RAW_INPUT ’ define value, it will allow you to validate the PCM/I2S interface.

Can we get a 13MHz MCLK for e.g.: MAX9860ETG+T from the RSL10? Can you please give a connection example?

No info about PCM_SERO in the hardware reference, the other signals are explained. Also what to do with the MCLK signal?

We don’t find clear info about I2S/PCM interfaces in this project … Anything clear, just as an example to test here?

The RSL10 does not have a PLL to generate an arbitrary output clock frequency. The 48MHz crystal can be divided by 4 to generate a 12MHz user clock which can be output on a GPIO pin. From the Datasheet it looks like a 12MHz is an option for the MAX9860 MCLK requirement.

PCM_SERO is used as the serial PCM data output for I2S interfaces that are transmitting data. PCM_SERI is used as the serial PCM data input for I2S interfaces that are receiving data.

For codecs that require a high speed master clock, that can be driven by the RSL10’s user clock derived from the 48MHz oscillator if an integer divided value is acceptable. If not then either an external PLL or a codec with an integrated PLL would be needed to synthesize the Master Clock external to the RSL10.

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