How to interpret Reset Status when ACS_RESET_STATUS = 1

Our firmware sees

(DIG_RESET_STATUS, ACS_RESET_STATUS) = (0x5, 0x0),

i.e. ACS_RESET_FLAG = 1 and WATCHDOG_RESET_FLAG = 1,

should we interpret this as
a) Reset due to the watchdog with the ARM Cortex-M3 processor not in lockup state, or
b) Reset due to wake-up from sleep mode
?

In this case a “Reset due to wake-up from sleep mode” has occurred because the ACS_RESET_FLAG is set and all ACS_RESET_STATUS bits are low. Concurrently a “Reset due to the watchdog with the ARM Cortex-M3 processor not in lockup state” has occurred since the “WATCHDOG_RESET_FLAG” is set and the “LOCKUP_FLAG” is clear. So I’d interpret this as a wake event expiration of the Watchdog Timer when not in lockup state.

1 Like

In other words, can one say that
a “Reset due to wakeup from sleep mode” is followed by a
“Reset due to the watchdog with the ARM … not in lockup state”?

All that can be stated is that since the reset flags were last cleared these resets both occurred. The ordering cannot be inferred from the register bits, and in some cases resets may be concurrent.

That being said, it is quite possible that the device woke and then the watchdog expired when the registers are in the state you’re reporting.

1 Like