How do I calculate the period of a general purpose timer in rsl10?

Taking the timer_free_run sample program for reference, for timer_config = 1 it is using the settings as follows:

        Sys_Timer_Set_Control(0, (TIMER_MULTI_COUNT_8 |
                                  TIMER_FREE_RUN      |
                                  TIMER_SLOWCLK_DIV2  |
                                  TIMER_PRESCALE_64)  | 1000);

The formula for finding timer delay is
according to RSL10_hardware_reference.pdf page 372.

Using the example of timer_free_run sample program, how do I calculate the timer delay?

I also have the following related questions:

  1. It seems f_slowclock = 1 MHz in my case, f_sysclock seems to be 10 MHz. How do I find out this value programmatically? I am using The RSL10 development board (EVBUM2529/D) and the value for SYSCLK doesn’t seem to be mentioned in the datasheet. Where should I have looked to see that SYSCLOCK is 10 MHz for my development board?

  2. What does TIMER_MULTI_COUNT_8 do in a free running timer in the timer_free_run sample program?

  3. timer_driver sample program seems to use a different method to initialize timer. What is the timer_driver sample program trying to show? If I just need a basic timer should I use timer_free_run or timer_driver as the base program? When would I use one over the other?

Please see our feedback below:

I am not sure how you came to this conclusion. We measured the LED toggling of this sample application in its default configuration and found it was ~65ms between toggle.

Following the formula from the Hardware reference that he provided above, we got the following:


This setting does not do anything when the timer is running is β€˜β€™ Free Run ’ mode, it only applies when the timer is running in β€˜β€™ Multi-Shot ’ mode by counting the number of timer occurrences before stopping the timer and issuing the interrupt. In β€˜β€™ Free Run ’ mode the interrupt will be triggered on every timeout.

The β€˜β€™ timer_driver ’ sample code uses our new CMSIS wrapper for the system timer hardware registers. The β€˜β€™ timer_free_run ’ sample code uses our firmware level abstraction to access the hardware registers instead. The functionality of both will be identical, but the β€˜β€™ timer_driver ’ sample code will future proof more of your firmware if you ever decide to implement it on other RSL family devices that are released in the future.

As this sample code does not apply any changes to the RSL10’s clock systems on startup, it will be suing the defaults of:

  • System Clock - 3MHz RC Oscillator
  • Slow Clock Prescale - 3
  • Slow Clock - 1MHz

There is no way to determine this directly in eclipse, but by checking the prescale values within the hardware registers, knowing what frequency System Clock is operating at, and using the Clock Distribution diagram from the Hardware Reference, it is a straight forward task to calculate what all of your clock frequencies will be. The other option is to output the clock through a DIO and measure it on a scope to increase confidence.

If I send SYSCLOCK to DIO0, this is what I see on the oscilloscope:


So does this mean SYSCLK is 10 MHz and SLOWCLK is 1 MHz? Or did I do something wrong while initializing? This is my initialization function:

void Initialize(void)
/* Mask all interrupts */

/* Disable all existing interrupts, clearing all pending source */

/* Test DIO12 to pause the program to make it easy to re-flash */
                         DIO_LPF_DISABLE | DIO_6X_DRIVE;

/* Setup DIO5 as a GPIO input with interrupts on transitions, DIO6 as a
 * GPIO output. Use the integrated debounce circuit to ensure that only a
 * single interrupt event occurs for each push of the pushbutton.
 * The debounce circuit always has to be used in combination with the
 * transition mode to deal with the debounce circuit limitations.
 * A debounce filter time of 50 ms is used. */

Sys_DIO_Config(TIMER_DIO, DIO_MODE_GPIO_OUT_0);         // 2021-04-26

                  DIO_DEBOUNCE_SLOWCLK_DIV1024, 49);

/* Configure timer[0] in free run mode.
 * - Force multi-count to 8 in order to show that field is not active */
Sys_Timer_Set_Control(0, (TIMER_MULTI_COUNT_8 |
                          TIMER_FREE_RUN      |
                          TIMER_SLOWCLK_DIV2  |
                          TIMER_PRESCALE_32)  | 1000);
// */
Sys_Timer_Set_Control(0, (TIMER_MULTI_COUNT_1 | TIMER_FREE_RUN | TIMER_SLOWCLK_DIV2 | TIMER_PRESCALE_2) | 4000  );       // @ SYSCLK: 10M and SLOWCLK: 1M, timer period: 16 ms

Sys_DIO_Config(0, DIO_MODE_SYSCLK);            // 10 MHz
Sys_DIO_Config(1, DIO_MODE_SLOWCLK);          // 1 MHz


/* Stop masking interrupts */