According to the RSL10 Hardware Reference “IMPORTANT: To clear the status bits that indicate the source of a reset, the DIG_RESET_STATUS register must be cleared before the ACS_RESET_STATUS register.”
On the other hand, the sample code sleep_RAM_retention (e.g. SDK 3.4) does the opposite i.e. the ACS_RESET_STAUS is cleared before the DIG_RESET_STATUS.
What is the correct order?
The RSL10 Hardware Reference and RSL10 Product Spec both agree that we need to clear the DIG register first and the ACS register seconds. This is an error in the sample code (we will address this internally ) , and the HW Reference should be followed instead.