Ax5243 PLL LOCK

Connectivity Sub-GHz
#1

Hello dear friends!
The following problem arose:
when the PWRMODE register is switched from the SYNTHTX state to the FULLTX state,
the PLL phase capture is lost (the PLL LOCK bit in the PLLRANGINGA register goes to state 0).
When you switch the PWRMODE register from the SYNTHRX state to the FULLRX state, this does not happen.
Why is this happening and how to deal with it?

Thanks in advance.

#2

@arsanya
May I know which of the boards are you using? Do you have your own build or any of our EVB board ?

Have you used an external inductor or internal inductor?

#3

Dear Martin!
This happens both with the internal inductor and with the external one. Proprietary board. I can send you a diagram

#4

@arsanya
Please attach your complete project files generated via Radio LAB GUI.
Thank you for using our community forum!

#5

Dear Martin! The problem has been resolved. Thank you.