Hello,
I’m trying to implement the wake-on-radio mode on our product.
We developped the standard rx/tx mode and now we want to achieve the wor mode due to power reduction.
I generated an example using AX-radiolab and tried to implement the generated code. The reception of a packet is ok but I don’t have any interrupt generated when the packet is received in wor RX.
I checked the low power oscillator and it’s running.
I checked that the wake-up timer is running.
I checked that a wake-up interrupt is generated using polling method of IRQRWAKEUPTIMER bit.
But i’m not able to generate any wor interrupt on the IRQ pin.
The initialisation is the same as the standard RX/TX mode except that I initialyze the lpo and set the rx_on_wor mode.
Here is the the code of this two function :
uint8_t ax5043_calibrate_lpo(ax5043_handle_t *ax5043){
uint8_t reg_val;
uint32_t i;
reg_val = 0x00;
ax5043_write_reg(ax5043, AX5043_LPOSCFREQ1, ®_val, 1);
reg_val = 0x00;
ax5043_write_reg(ax5043, AX5043_LPOSCFREQ0, ®_val, 1);
reg_val = ((ax5043->config.rf_tune_param.f_xtal / 640) >> 8) & 0xFF;
ax5043_write_reg(ax5043, AX5043_LPOSCFREQ1, ®_val, 1);
reg_val = ((ax5043->config.rf_tune_param.f_xtal / 640) >> 0) & 0xFF;
ax5043_write_reg(ax5043, AX5043_LPOSCFREQ0, ®_val, 1);
reg_val = AX5043_PWRSTATE_SYNTH_RX;
ax5043_write_reg(ax5043, AX5043_PWRMODE, ®_val, 1);
reg_val = ((ax5043->config.lpo_param.sckfiltmax) >> (8 + 1)) & 0xFF;
ax5043_write_reg(ax5043, AX5043_LPOSCKFILT1, ®_val, 1);
reg_val = (ax5043->config.lpo_param.sckfiltmax >> 1) & 0xFF;
ax5043_write_reg(ax5043, AX5043_LPOSCKFILT1, ®_val, 1);
ax5043_wait_for_oscillator(ax5043);
reg_val = 0x25;
ax5043_write_reg(ax5043, AX5043_LPOSCCONFIG, ®_val, 1);
ax5043_wait_n_lpo_cycles(ax5043, 6);
reg_val = ((ax5043->config.lpo_param.sckfiltmax) >> (8 + 2)) & 0xFF;
ax5043_write_reg(ax5043, AX5043_LPOSCKFILT1, ®_val, 1);
reg_val = (ax5043->config.lpo_param.sckfiltmax >> 2) & 0xFF;
ax5043_write_reg(ax5043, AX5043_LPOSCKFILT1, ®_val, 1);
ax5043_wait_n_lpo_cycles(ax5043, 5);
reg_val = 0x00;
ax5043_write_reg(ax5043, AX5043_LPOSCCONFIG, ®_val, 1);
reg_val = AX5043_PWRSTATE_POWERDOWN;
ax5043_write_reg(ax5043, AX5043_PWRMODE, ®_val, 1);
}
uint8_t ax5043_rx_on_wor(ax5043_handle_t *ax5043) {
uint8_t reg_val, reg_val_2;
uint32_t wp;
ax5043_set_registers_rx(ax5043);
reg_val = 0x02;
ax5043_write_reg(ax5043, AX5043_BGNDRSSIGAIN, ®_val, 1);
reg_val = 0x03;
ax5043_write_reg(ax5043, AX5043_FIFOSTAT, ®_val, 1);
reg_val = 0x01;
ax5043_write_reg(ax5043, AX5043_LPOSCCONFIG, ®_val, 1); // start LPOSC, slow mode
reg_val = 0x00;
ax5043_write_reg(ax5043, AX5043_RSSIREFERENCE, ®_val, 1); // start LPOSC, slow mode
reg_val = AX5043_PWRSTATE_WOR_RX;
ax5043_write_reg(ax5043, AX5043_PWRMODE, ®_val, 1);
reg_val = 0x01;
ax5043_write_reg(ax5043, AX5043_IRQMASK0, ®_val, 1); // enable FIFO not empty
reg_val = 0x01;
ax5043_write_reg(ax5043, AX5043_IRQMASK1, ®_val, 1);
wp = 6;
reg_val = ((wp >> 8) & 0xFF);
ax5043_write_reg(ax5043, AX5043_WAKEUPFREQ1, ®_val, 1);
reg_val = ((wp >> 0) & 0xFF);
ax5043_write_reg(ax5043, AX5043_WAKEUPFREQ0, ®_val, 1);
ax5043_read_reg(ax5043, AX5043_WAKEUPTIMER1, ®_val, 1);
ax5043_read_reg(ax5043, AX5043_WAKEUPTIMER0, ®_val_2, 1);
wp += ((reg_val << 8) | reg_val_2);
reg_val = ((wp >> 8) & 0xFF);
ax5043_write_reg(ax5043, AX5043_WAKEUP1, ®_val, 1);
reg_val = ((wp >> 0) & 0xFF);
ax5043_write_reg(ax5043, AX5043_WAKEUP0, ®_val, 1);
// reg_val = 0x02;
// ax5043_write_reg(ax5043, AX5043_IRQMASK1, ®_val, 1);
// while(1) {
// ax5043_read_reg(ax5043, AX5043_IRQREQUEST1, ®_val, 1);
// if((reg_val & (1 << 1) == (1 << 1))) {
// break;
// }
// }
}
Can someone tell me what I’m doing wrong ?
Best Regards,
Fabian