AX5043 - clock recovery problem and working in wire mode

in system is used old Keeloq system, which is not possible to change because of backward compatibility. In this system main problem is with gap between preamble and data packet. I assume that AX5043 is working like on preamble recovering clock and after that is sampling data incoming on RF.
HCS is sending preamble, “header” and data. Header is ~10bits, where only zeroes are and during this time clock isn’t refreshed, so receiver is losing clock settings, after that first bit of data and whole frame has error.
Ideal for customer will be – preamble receive, clock freeze for ~4ms and rececive data with stored clock.
Is there way to use transceiver in this mode with such transmission?
second question:
Has “wire mode” solution same sensitivity as in “frame mode”?

Arek S.