Table of Contents

  Page
Welcome
RSL15 Getting Started Guide
Using RSL15 Central Mobile App to Establish a Bluetooth Low Energy Connection
Setting Up the RSL15 Evaluation and Development Board
Configuring and Connecting Hardware
Getting Started with the onsemi IDE
Software to Download
onsemi IDE Installation Procedure
RSL15 CMSIS-Pack Installation Procedure
Importing the Sample code
Building the Sample Code
Debugging the Sample Code
Viewing Peripheral Registers with the onsemi IDE
Getting Started with Keil®
Software to Download
Keil Installation Procedure
RSL15 CMSIS-Pack Installation Procedure
Importing the Sample Code
Building the Sample Code
Debugging the Sample Code
Preparing J-Link for Debugging
Debugging Applications
Getting Started with IAR
Prerequisite Software: Downloading and Installation
RSL15 CMSIS-Pack Installation Procedure
Building Your First Sample Application with the IAR Embedded Workbench
Resolving External CMSIS-Pack Dependencies
External CMSIS_Pack Dependencies
Resolving External Dependencies
Accessing Documentation Included with the CMSIS-Pack
Accessing Documentation through the onsemi IDE
Accessing Documentation via the Keil μVision IDE
RSL15 Developer’s Guide
From Blinky to Building Your Own Application
Progression
RSL15 CMSIS-Pack Component Description
The RSL15 CMSIS-Pack Component Structure
Modifying Linked System-Level Files
How to Build Your Own RSL15 Application
Option 1: Using the CMSIS-Pack Features to Build Your Own Application
Copying Application Code Files
Library and System Files
Updating to a New CMSIS-Pack
Option 2: Unzip the CMSIS-Pack (Advanced Users)
Diagnostic Strategies
General Debugging Strategies
Breakpoints
Debugging Best Practices
Printing to a Console with swmTrace
onsemi IDE Setup Requirements
Printing Methods
Blocking Versus Non-Blocking Modes
Debugging with Sleep Mode
TrustZone Application Development and Debugging
Activity Counters
Debugging Applications that are Not Stored at the Base Address of Flash
Strategies for Handling Application Errors
Third-party tools
RSL15 Flash Variants
Available Flash Variants with RSL15
Building an Application for an RSL15-284 Device
RSL15 Packages
Running from Flash vs Running from RAM
Flash vs. RAM in Sample Applications
Applications Running from Flash
Applications Running from RAM
Arm Toolchain Support
Basic Installation
Configuring the Arm Toolchain in the onsemi IDE
Additional Settings
Floating Point Unit (FPU) Support
RSL15 Firmware Reference
Firmware Overview
Introduction
Compliance Exceptions
Supported Data Types
Firmware Components
Firmware Naming Conventions
Firmware Resource Usage
Versions
Hardware Definitions
Register and Register Bit-Field Definitions
Memory Map Definition
Interrupt Vector Definition
Hardware Abstraction Layer
Usage
CMSIS Library
Introduction
CMSIS Drivers
Introduction
Using the CMSIS Drivers
Adding a CMSIS Driver
Configuring CMSIS Drivers with RTE_Device.h
Program ROM
Overview
Versions
ROM Initialization Sequence
ROM Basic Initialization
ROM Status Variables & Status Codes
Application Validation and Boot
Vector Tables
Security Subsystem
Secure Boot Process
ROM Life Cycle States (LCS) & Operational Modes
Data Exchange Unit (DEU) Support
Reserved Flash Sectors
Flash Library
Library Forms
Flash Library Usage
Security and Life Cycle Provisioning Elements
Overview
Third Party Documentation
Arm CryptoCell-312 Security IP
Arm CryptoCell-312 Mbed TLS
Event Kernel
Overview
Include Files
Kernel Environment
Messages
Overview
Message Format
Parameter Management
Message Queue Primitives
Message Allocation
Prototype:
Parameters:
Return:
Description:
Message Allocation Macro (Static Structure)
Prototype:
Parameters:
Return:
Description:
Message Allocation Macro (Variable Structure)
Prototype:
Parameters:
Return:
Description:
Message Free
Prototype:
Parameters:
Return:
Description:
Message Free Macro
Prototype:
Parameters:
Return:
Description:
Message Send
Prototype:
Parameters:
Return:
Description:
Message Send Basic
Prototype:
Parameters:
Return:
Description:
Message Forward
Prototype:
Parameters:
Return:
Description:
Scheduler
Overview
Requirements
Scheduling Algorithm
Save Service
Tasks
Kernel Timer
Overview
Time Definition
Timer Object
Timer Setting
Time Primitives
Timer Set
Prototype:
Parameters:
Return:
Description:
Timer Clear
Prototype:
Parameters:
Return:
Description:
Timer Activity
Prototype:
Parameters:
Return:
Description:
Timer Adjust
Prototype:
Parameters:
Return:
Description:
Timer Expiry
Useful Macros
Bluetooth Stack
Introduction
Include and Object Files
Bluetooth Stack
Stack Support Functions
Managing Bluetooth Low Energy Stack RAM Usage
HCI
HCI Software Architecture
GATT
GAP
Non-Connected Procedures
Activity Overview
Advertising Activity
Advertising Properties
Legacy Advertising Activity
Extended Advertising Activity
Periodic Advertising Activity
Scanning Activity
Initiating Activity
Periodic Synchronization Activity
Bluetooth and Kernel Library
Use of the Event Kernel and Bluetooth Stack
The Kernel Scheduler
Message Handlers
Core Bluetooth Profiles
Standard Profiles and Services
Custom Profiles and Services
Event Kernel and Bluetooth Low Energy Library Initialization and Execution
Baseband and Kernel Functions
BLE_Initialize
Prototype:
Parameters:
Return:
Description:
Example
BLE_Baseband_Sleep
Prototype:
Parameters:
Return:
Description:
Example:
BLE_Kernel_Process
Prototype:
Parameters:
Return:
Description:
Example:
BLE_Baseband_Is_Awake
Prototype:
Parameters:
Return:
Description:
Example:
Managing Bluetooth Low Energy Stack RAM Usage
Bluetooth Low Energy Link Layer Metrics
BLE_Link_Metrics
Bluetooth Stack Supporting API Functions
Device_BLE_Param_Get
Prototype:
platform_reset
Prototype:
srand_func
Prototype:
rand_func
Prototype:
Device_RF_RSSI_Convert
Prototype:
Device_RF_TxPwr_Get_dBm
Prototype:
Device_RF_TxPwr_Get_Idx
Prototype:
BLE_Set_RxStatusCallBack
Prototype:
Parameters:
Return:
Description:
Examples:
Device_RF_SetMaxPwrIdx
Prototype:
BLE_Set_ScanConIndStatusCallBack
Prototype:
Parameters:
Return:
Description:
Example:
Hci_Vs_Cmd_App_Func
Prototype:
Parameters:
Return:
Description:
Example:
BLE_Set_MaxRFConnectionPwr
Prototype:
Parameters:
Return:
Description:
Example:
uint32_t ke_get_max_mem_usage
Prototype:
Parameters:
Return:
Description:
Example:
uint16_t ke_get_mem_usage
Prototype:
Parameters:
Return:
Description:
Example:
Bluetooth Low Energy Abstraction
swmTrace Library
Introduction
onsemi IDE Setup
Usage
CMSIS Reference
CMSIS Reference Variable Documentation
CMSIS Reference Data StructuresType Documentation
CMSIS Reference Macro Definition Documentation
CMSIS Reference Function Documentation
Hardware Abstraction Layer Reference
Activity Counter
Activity Counter Function Documentation
Analog Control System
Analog Control System Function Documentation
Asynchronous Clock Counter
Asynchronous Clock Counter Function Documentation
Baseband Interface
Baseband Interface Macro Definition Documentation
Baseband Interface Function Documentation
Clock Configuration
Clock Configuration Variable Documentation
Clock Configuration Function Documentation
Arm Cortex-M Processor
Arm Cortex-M Processor Macro Definition Documentation
Cyclic Redundancy Check
Cyclic Redundancy Check Macro Definition Documentation
Cyclic Redundancy Check Function Documentation
Direct Memory Access
Direct Memory Access Macro Definition Documentation
Direct Memory Access Function Documentation
Flash Copier
Flash Copier Function Documentation
General-Purpose I/O Interface
General-Purpose I/O Interface Macro Definition Documentation
General-Purpose I/O Interface Function Documentation
I2C
I2C Macro Definition Documentation
I2C Function Documentation
LIN
LIN Function Documentation
LSAD
LSAD Typedef Documentation
LSAD Data StructuresType Documentation
LSAD Enumeration Type Documentation
LSAD Macro Definition Documentation
LSAD Function Documentation
Nested Vectored Interrupt Controller
Nested Vectored Interrupt Controller Function Documentation
Power Supply
Power Supply Function Documentation
HAL Power Modes
HAL Power Modes Typedef Documentation
HAL Power Modes Data StructuresType Documentation
HAL Power Modes Enumeration Type Documentation
HAL Power Modes Macro Definition Documentation
HAL Power Modes Function Documentation
Pulse-Width Modulation
Pulse-Width Modulation Macro Definition Documentation
Pulse-Width Modulation Function Documentation
RFFE Radio Frequency Front End
RFFE Radio Frequency Front End Macro Definition Documentation
RFFE Radio Frequency Front End Function Documentation
Real-Time Clock
Real-Time Clock Function Documentation
SAR_ADC
SAR_ADC Macro Definition Documentation
SAR_ADC Function Documentation
Simple Assertions
Simple Assertions Macro Definition Documentation
Ultra-Low Power Data Acquisition Subsystem
Ultra-Low Power Data Acquisition Subsystem Function Documentation
SPI
SPI Macro Definition Documentation
SPI Function Documentation
General-Purpose Timer
General-Purpose Timer Macro Definition Documentation
General-Purpose Timer Function Documentation
Time of Flight
Time of Flight Function Documentation
Trimming Support
Trimming Support Variable Documentation
Trimming Support Enumeration Type Documentation
Trimming Support Macro Definition Documentation
Trimming Support Function Documentation
UART
UART Macro Definition Documentation
UART Function Documentation
Watchdog
Watchdog Macro Definition Documentation
Flash Library Reference
Flash Library Reference Variable Documentation
Flash Library Reference Macro Definition Documentation
Flash Library Reference Function Documentation
CMSIS Drivers Reference
CMSIS Drivers Reference Typedef Documentation
CMSIS Drivers Reference Data StructuresType Documentation
CMSIS Drivers Reference Enumeration Type Documentation
CMSIS Drivers Reference Macro Definition Documentation
CMSIS DMA Driver
CMSIS DMA Driver Typedef Documentation
CMSIS DMA Driver Data StructuresType Documentation
CMSIS DMA Driver Enumeration Type Documentation
CMSIS DMA Driver Macro Definition Documentation
CMSIS DMA Driver Function Documentation
CMSIS GPIO Driver
CMSIS GPIO Driver Typedef Documentation
CMSIS GPIO Driver Data StructuresType Documentation
CMSIS GPIO Driver Enumeration Type Documentation
CMSIS GPIO Driver Macro Definition Documentation
CMSIS GPIO Driver Function Documentation
CMSIS I2C Driver
CMSIS I2C Driver Typedef Documentation
CMSIS I2C Driver Data StructuresType Documentation
CMSIS I2C Driver Macro Definition Documentation
CMSIS I2C Driver Function Documentation
CMSIS PWM Driver
CMSIS PWM Driver Typedef Documentation
CMSIS PWM Driver Data StructuresType Documentation
CMSIS PWM Driver Enumeration Type Documentation
CMSIS PWM Driver Macro Definition Documentation
CMSIS PWM Driver Function Documentation
CMSIS SPI Driver
CMSIS SPI Driver Typedef Documentation
CMSIS SPI Driver Data StructuresType Documentation
CMSIS SPI Driver Macro Definition Documentation
CMSIS SPI Driver Function Documentation
CMSIS Timer Driver
CMSIS Timer Driver Typedef Documentation
CMSIS Timer Driver Data StructuresType Documentation
CMSIS Timer Driver Enumeration Type Documentation
CMSIS Timer Driver Macro Definition Documentation
CMSIS Timer Driver Function Documentation
CMSIS USART Driver
CMSIS USART Driver Typedef Documentation
CMSIS USART Driver Data StructuresType Documentation
CMSIS USART Driver Enumeration Type Documentation
CMSIS USART Driver Macro Definition Documentation
CMSIS USART Driver Function Documentation
swmTrace Reference
swmTrace Reference Macro Definition Documentation
swmTrace Reference Function Documentation
Bluetooth Low Energy Stack Abstraction
Bluetooth Low Energy Stack Abstraction Typedef Documentation
Bluetooth Low Energy Stack Abstraction Variable Documentation
Bluetooth Low Energy Stack Abstraction Data StructuresType Documentation
Bluetooth Low Energy Stack Abstraction Enumeration Type Documentation
Bluetooth Low Energy Stack Abstraction Macro Definition Documentation
Bluetooth Low Energy Stack Abstraction Function Documentation
BLE_ABSTRACTION
BLE_ABSTRACTION Data StructuresType Documentation
BLE_ABSTRACTION Macro Definition Documentation
BLE_ABSTRACTION Function Documentation
RSL15 Hardware Reference
System Overview
System Architecture
Security System Architecture
Integrated IoT Cybersecurity Platform
Secure Boot with Root of Trust
Arm Lifecycle State Management
Application and Data Cryptographic Services
TrustZone Arm Cortex-M33 Peripherals
Radio System Architecture
RF Subsystem
Bluetooth Low Energy
Power
Power Management Unit (PMU) Battery Monitoring and Resets
Power Modes Overview
Clocking
RTC
Memory
Interfaces
General Purpose Input/Output (GPIO)
Communications Interfaces
I2C
LIN
PCM
PWM
SPI
UART
Sensor Support Interfaces
Analog Comparator
SAR ADC
Pulse Counter
Low Speed ADC
Simple DAC
Current Source
ULP Data Acquisition Subsystem
Peripherals
Activity Counter
Asynchronous Clock Counter
CRC
DMA Controller
Flash Copier
Time of Flight
Timers
Watchdog
Firmware Reference Libraries
SoC Identification
SoC Identification Registers
AHBREGS_CHIP_ID_NUM
Arm Cortex-M33 Processor
Introduction
Debug Port
Private Peripherals
SysTick
Nested Vector Interrupt Controller (NVIC)
Interrupt Priority Registers
System Control
Memory Protection Unit
Security Attribution Unit
Debug Controller
Halting Debug Configuration and Status
Debug Monitor Configuration
Arm Cortex-M33 Processor Core Register Access
Debug Fault Status Register
Software Interrupts
Floating-Point Extension
Private Peripherals Registers
SysTick Registers
SysTick_CTRL
SysTick_LOAD
SysTick_VAL
SysTick_CALIB
NVIC Registers
NVIC_ISER0
NVIC_ISER1
NVIC_ICER0
NVIC_ICER1
NVIC_ISPR0
NVIC_ISPR1
NVIC_ICPR0
NVIC_ICPR1
NVIC_IABR0
NVIC_IABR1
NVIC_ITNS0
NVIC_ITNS1
NVIC_IPR0
NVIC_IPR1
NVIC_IPR2
NVIC_IPR3
NVIC_IPR4
NVIC_IPR5
NVIC_IPR6
NVIC_IPR7
NVIC_IPR8
NVIC_IPR9
NVIC_IPR10
NVIC_IPR11
NVIC_IPR12
NVIC_IPR13
NVIC_IPR14
NVIC_ISER0_NS
NVIC_ISER1_NS
NVIC_ICER0_NS
NVIC_ICER1_NS
NVIC_ISPR0_NS
NVIC_ISPR1_NS
NVIC_ICPR0_NS
NVIC_ICPR1_NS
NVIC_IABR0_NS
NVIC_IABR1_NS
NVIC_IPR0_NS
NVIC_ICPR1_NS
NVIC_IPR2_NS
NVIC_IPR3_NS
NVIC_IPR4_NS
NVIC_IPR5_NS
NVIC_IPR6_NS
NVIC_IPR7_NS
NVIC_IPR8_NS
NVIC_IPR9_NS
NVIC_IPR10_NS
NVIC_IPR11_NS
NVIC_IPR12_NS
NVIC_IPR13_NS
NVIC_IPR14_NS
Memory Protection Unit Registers
MPU_TYPE
MPU_CTRL
MPU_RNR
MPU_RBAR
MPU_RLAR
MPU_RBAR1
MPU_RLAR1
MPU_RBAR2
MPU_RLAR2
MPU_RBAR3
MPU_RLAR3
MPU_MAIR0
Security Attribution Unit Registers
SAU_CTRL
SAU_TYPE
SAU_RNR
SAU_RBAR
SAU_RLAR
SAU_SFSR
SAU_SFAR
Debug Control Block Registers
DEBUG_DHCSR
DEBUG_DCRSR
DEBUG_DCRDR
DEBUG_DEMCR
DEBUG_DAUTHCTRL
DEBUG_DSCSR
Software Interrupts Registers
SIG_STIR
Floating Point Extension Registers
FPE_FPCCR
FPE_FPCAR
FPE_FPDSCR
FPE_MVFR0
FPE_MVFR1
FPE_MVFR2
Arm TrustZone CryptoCell-312 Security IP
Cryptographic Features
True Random Number Generator (TRNG)
Power Configuration
TrustZone
Secure Execution
Non-Secure Execution
Non-Secure Use of Secured Features
Arm TrustZone CryptoCell-312 Registers
SYSCTRL_CRYPTOCELL_PWR_CFG
SYSCTRL_NS_ACCESS_PERIPH_CFG0
SYSCTRL_NS_ACCESS_PERIPH_CFG1
SYSCTRL_NS_ACCESS_RAM_CFG0
SYSCTRL_NS_ACCESS_RAM_CFG1
SYSCTRL_DEU_STATUS
SYSCTRL_DEU_DATA
SYSCTRL_PROD_STATUS
SYSCTRL_CC_DCU_EN0
SYSCTRL_CC_DCU_EN1
SYSCTRL_CC_DCU_EN2
SYSCTRL_CC_DCU_EN3
SYSCTRL_CC_DCU_LOCK0
SYSCTRL_CC_DCU_LOCK1
SYSCTRL_CC_DCU_LOCK2
SYSCTRL_CC_DCU_LOCK3
SYSCTRL_CC_STATUS
SYSCTRL_CC_FEATURES_CTRL
RF Front-End
Overview
RFFE Interface
RFFE PowerUp
VDDPA Dynamic Control
RFFE Data Steaming
7.2.6.3.1 Phase ADC and RSSI data streaming
I/Q data streaming
RFFE System Resources
48 MHz Crystal Oscillator
Radio Clocks
Registers
FSM and Global Configuration
TX and RX Start Sequence Example
RX Timeout
MAC Timers
Protocol Timers
Time Stamps
Delta Time
Commands
Protocol Timer, Delta Timer, and Command Example
RFFE GPIO
Interrupts
FIFOs
Accessing the FIFOs and FIFO Status
Packet handling
Packet Format
Preamble
Pattern
Packet Length
Address
Multi-Frame
CRC
Bluetooth Low Energy Direct Test Mode
Bluetooth Low-Energy Direction Finding
TX Mode
RX Mode
CTE Sampling
Antenna Switching Pattern
Coding
Manchester Coding
Data-Whitening
IEEE 802.15.4 Bit to Chip Conversion
New IEEE 802.15.4 Chip to Bit Decoder
Linear to Frequency
Convolutional Codes
Puncturing Codes
4FSK coding
Bluetooth Low Energy Long Range
Miscellaneous and Encoding Order
Radio Configuration
Data Rate
Fractional Data Rate
Central Frequency
Channels
Pulse Shape
Modulation Index
Interpolator
Channel Filter Configuration
Phase and RSSI Fractional Decimation
Carrier Recovery
Rough Carrier Recovery
Fine Carrier Recovery
Carrier Recovery Boundaries
RSSI Detection
Delay Line Synchronization
Matched Filtering
Clock and Data-Rate Recovery
Decision
Viterbi Algorithm
RSSI Filtering and AGC
Peak Detector
RSSI and Peak-Detector Combined AGC Strategy
Continuous Wave (CW) Configuration
Direct Test Mode (DTM)
Power Amplifier and Ramp Up/Down Sequence
RF Front-End Registers
RF_REG00
RF_REG01
RF_REG02
RF_REG03
RF_PADS_03
RF_PADS_47
RF_CENTER_FREQ
RF_PADS_89
RF_REG08
RF_CODING
RF_PACKET_HANDLING
RF_SYNC_PATTERN
RF_REG0C
RF_PACKET_EXTRA
RF_CRC_POLYNOMIAL
RF_CRC_RST
RF_REG10
RF_REG11
RF_TX_PULSE_SHAPE_1
RF_TX_PULSE_SHAPE_2
RF_TX_PULSE_SHAPE_3
RF_TX_PULSE_SHAPE_4
RF_FRONTEND
RF_RX_PULSE_SHAPE
RF_REG18
RF_REG19
RF_REG1A
RF_REG1B
RF_RSSI_CTRL
RF_REG1D
RF_AGC_LUT1
RF_AGC_LUT2
RF_AGC_LUT3
RF_AGC_LUT4
RF_AGC_LUT5
RF_AGC_ATT1
RF_AGC_ATT2
RF_REG25
RF_BIAS_0_2
RF_BIAS_3_6
RF_BIAS_7_9
RF_BIAS_10_12
RF_REG2A
RF_PLL_CTRL
RF_DLL_CTRL
RF_REG2D
RF_REG2E
RF_XTAL_CTRL
RF_SUBBAND
RF_REG31
RF_DEMOD_CTRL
RF_REG33
RF_REG34
RF_BLE_LR
RF_REG36
RF_PROT_TIMER
RF_CTE_OPTS
RF_PT_DELTA_0
RF_PT_DELTA_1
RF_CTE_IF
RF_CTE_CTRL
RF_AGC_ADVANCED
RF_DATA_STREAMING
RF_REVISION
RF_FSM_CTRL
RF_IQFIFO_STATUS
RF_TXFIFO
RF_RXFIFO
RF_IQFIFO
RF_REG45
RF_DESER_STATUS
RF_BLE_AEC_CCM
RF_IRQ_STATUS
RF_RSSI_MIN_MAX
RF_REG4A
RF_FEI
RF_REG4C
RF_ANALOG_INFO
RF_SAMPLE_RSSI
RF_RSSI_THERM
RF_LUT_ANTENNA_ARRAY_1
RF_LUT_ANTENNA_ARRAY_2
RF_LUT_ANTENNA_ARRAY_3
RF_LUT_ANTENNA_ARRAY_4
RF_REG50
RF_REG51
RF_REG52
RF_REG53
RF_REG54
RF_REG55
RF_REG56
Bluetooth Low Energy Baseband Controller
Overview
System Resources
Baseband Controller Interface
Baseband Controller Clock
WLAN Coexistence
BB Controller Interrupts
Baseband Counters and Timers
Active Mode
Low Power Mode
Bluetooth Low Energy Stack Deep Sleep Mode
Bluetooth Low Energy Stack Deep Sleep Mode Registers
Baseband Controller Registers and Non-CTE Antenna Definition
Baseband Controller Interface Registers
BBIF_CTRL
BBIF_STATUS
BBIF_COEX_CTRL
BBIF_COEX_STATUS
BBIF_COEX_INT_CFG
BBIF_COEX_INT_STATUS
BBIF_ID_NUM
Baseband Timer Registers
ACS_BB_TIMER_CTRL
Baseband Controller Registers
BB_RWBBCNTL
BB_VERSION
BB_RWBLEBCONF
BB_INTCNTL0
BB_INTSTAT0
BB_INTACK0
BB_INTCNTL1
BB_INTSTAT1
BB_INTACK1
BB_ACTFIFOSTAT
BB_CURRENTRXDESCPTR
BB_ETPR
BB_DEEPSLCNTL
BB_DEEPSLWKUP
BB_DEEPSLSTAT
BB_ENBPRESET
BB_FINECNTCORR
BB_CLKNCNTCORR
BB_DIAGCNTL
BB_DIAGSTAT
BB_DEBUGADDMAX
BB_DEBUGADDMIN
BB_ERRORTYPESTAT
BB_SWPROFILING
BB_RADIOCNTL0
BB_RADIOCNTL1
BB_RADIOCNTL2
BB_RADIOCNTL3
BB_RADIOPWRUPDN0
BB_RADIOPWRUPDN1
BB_RADIOPWRUPDN2
BB_RADIOPWRUPDN3
BB_RADIOTXRXTIM0
BB_RADIOTXRXTIM1
BB_RADIOTXRXTIM2
BB_RADIOTXRXTIM3
BB_SPIPTRCNTL0
BB_SPIPTRCNTL1
BB_SPIPTRCNTL2
BB_SPIPTRCNTL3
BB_AESCNTL
BB_AESKEY31_0
BB_AESKEY63_32
BB_AESKEY95_64
BB_AESKEY127_96
BB_AESPTR
BB_TXMICVAL
BB_RXMICVAL
BB_RFTESTCNTL
BB_RFTESTTXSTAT
BB_RFTESTRXSTAT
BB_TIMGENCNTL
BB_FINETIMTGT
BB_CLKNTGT1
BB_HMICROSECTGT1
BB_CLKNTGT2
BB_HMICROSECTGT2
BB_SLOTCLK
BB_FINETIMECNT
BB_ACTSCHCNTL
BB_STARTEVTCLKNTS
BB_STARTEVTFINECNTTS
BB_ENDEVTCLKNTS
BB_ENDEVTFINECNTTS
BB_SKIPEVTCLKNTS
BB_SKIPEVTFINECNTTS
BB_ADVTIM
BB_ACTSCANCNTL
BB_WPALCNTL
BB_WPALCURRENPTR
BB_SEARCH_TIMEOUT
BB_COEXIFCNTL0
BB_COEXIFCNTL1
BB_COEXIFCNTL2
BB_BLEMPRIO0
BB_BLEMPRIO1
BB_BLEMPRIO2
BB_RALCNTL
BB_RALCURRENTPTR
BB_RAL_LOCAL_RND
BB_RAL_PEER_RND
BB_DFCNTL0_1US
BB_DFCNTL0_2US
BB_DFCNTL1_1US
BB_DFCNTL1_2US
BB_DFCURRENTPTR
BB_DFANTCNTL
BB_DFIFCNTL
Clock Components
Overview
Clock Generation
RC Oscillator
48 MHz Crystal Oscillator
Standby RC Oscillator
32 kHz Crystal Oscillator
Debug Port Clock
Clock Generation Registers
ACS_RTC_CFG
ACS_RTC_CTRL
ACS_RTC_COUNT_THRES
ACS_RTC_COUNT
ACS_RTC_SECONDS
ACS_RTC_COUNT_LOAD
ACS_BB_TIMER_CTRL
Clock Distribution
System Clock (SYSCLK)
Standby Clock (STANDBYCLK)
Slow Clock (SLOWCLK)
Baseband Clock (BBCLK)
Real Time Clock (RTC)
RTC Output Control
User Clock (USRCLK)
Power Supply Clocks
Interface Clocks
Clock Distribution Registers
CLK_SYS_CFG
CLK_DIV_CFG0
CLK_DIV_CFG1
CLK_DIV_CFG2
ACS_RCOSC_CTRL
ACS_XTAL32K_CTRL
Clock Detector and System Monitor
Clock Detector Registers
ACS_CLK_DET_CTRL
Power Components
Power Management Unit
Power Supply Overview
Power Supply Inputs
Battery Supply Voltage (VBAT)
Digital Output Supply Voltage (VDDO)
Internal Power Supply Voltages
DC-DC Converter (VCC)
Internal Bandgap Reference Voltages
RF Supply Voltage
VDDPA
Connecting and Using VDDPA 
Dynamic VDDPA Control
Digital Supply Voltages
Analog Supply Voltage (VDDA)
Charge Pump Supply Voltage (VDDCP)
Flash Memory Supply Voltage
Power Supply Registers
ACS_VCC_CTRL
ACS_BG_CTRL
ACS_VDDRF_CTRL
ACS_VDDPA_CTRL
ACS_VDDC_CTRL
ACS_VDDM_CTRL
ACS_VDDRET_CTRL
ACS_VDDCP_CTRL
ACS_VDDFLASH_CTRL
ACS_WEDAC_CTRL
Resets
Resets Registers
ACS_RESET_STATUS
Power Modes
Keeping the Debugger Connected in Low Power Modes
Run Mode
Idle Mode
Sleep Mode
Smart Sense Mode
Deep Sleep Mode
Standby Mode
Entering a Low Power Mode
Waking Up from a Low Power Mode
Wakeup Sources
Power Modes Registers
SYSCTRL_WAKEUP_ADDR
ACS_PWR_MODES_CTRL
ACS_SLEEP_MODE_CFG
ACS_WAKEUP_CTRL
ACS_WAKEUP_CFG
ACS_WAKEUP_STATE
ACS_BOOT_CFG
ACS_BOOT_GP_DATA
ACS_PWR_CTRL
Timing
Startup Timing
Sleep Power Mode Related Timing
Standby Power Mode Related Timing
Memory
Architecture
Memory Instances
Memory Buses
Memory Arbitration
Memory Map and Usage
Flash Memory
Manually Configuring Memory Allocation
Data Memory
Other Memory Mapped Areas
Peripherals and Interfaces
Private Peripherals
Flash
Flash Characteristics
Flash Delays
Flash Memory Operations
Redundancy Sectors
Error-Correction Coding
Flash Memory Registers
FLASH_IF_CTRL
FLASH_MAIN_WRITE_UNLOCK
FLASH_MAIN_CTRL
FLASH_DELAY_CTRL
FLASH_CMD_CTRL
FLASH_IF_STATUS
FLASH_ADDR
FLASH_DATA
FLASH_NVR_WRITE_UNLOCK
FLASH_NVR_CTRL
FLASH_PATCH_ADDR
FLASH_COPY_CFG
FLASH_COPY_CTRL
FLASH_COPY_SRC_ADDR_PTR
FLASH_COPY_DST_ADDR_PTR
FLASH_COPY_WORD_CNT
FLASH_ECC_CTRL
FLASH_ECC_STATUS
FLASH_ECC_ERROR_ADDR
FLASH_ECC_UNCOR_ERROR_CNT
FLASH_ECC_COR_ERROR_CNT
FLASH_NVM_STATUS
FLASH_MAIN_MASK
FLASH_IF_ID_NUM
Memory Registers
SYSCTRL_CM33_LOOP_CACHE_CFG
SYSCTRL_ACCESS_ERROR
SYSCTRL_MEM_POWER_STARTUP
SYSCTRL_MEM_POWER_ENABLE
SYSCTRL_MEM_ACCESS_CFG
SYSCTRL_WAKEUP_ADDR
SYSCTRL_MEM_RETENTION_CFG
SYSCTRL_MEM_TIMING_CFG
General Purpose Input/Output
Overview
Functional Configuration
JTAG I/O Functional Configuration
Analog Test Output
Physical Configuration
nRESET Pull Resistor Configuration
JTAG I/O Pad Configuration
Direct Control
GPIO Interrupts
GPIO Registers
GPIO_CFG
GPIO_INPUT_DATA
GPIO_OUTPUT_DATA
GPIO_OUTPUT_DATA_SET
GPIO_OUTPUT_DATA_CLR
GPIO_DIR
GPIO_MODE
GPIO_INT_CFG
GPIO_INT_STATUS_S
GPIO_INT_STATUS
GPIO_INT_DEBOUNCE
GPIO_JTAG_SW_PAD_CFG
GPIO_SRC_SPI
GPIO_SRC_SPI_IO
GPIO_SRC_UART
GPIO_SRC_I2C
GPIO_SRC_PCM
GPIO_SRC_LIN
GPIO_SRC_NMI
GPIO_SRC_BB_RX
GPIO_SRC_BB_SPI
GPIO_SRC_BB_COEX
GPIO_SRC_BB_IQ_DATA
GPIO_SRC_BB_IQ_DATA_P
GPIO_SRC_RF_SPI
GPIO_SRC_RF_GPIO03
GPIO_SRC_RF_GPIO47
GPIO_SRC_RF_GPIO89
GPIO_SRC_RF_CTE
GPIO_SRC_ASCC
GPIO_SRC_EXTCLK
ACS_AOUT_CTRL
Communication Interfaces
I2C Interfaces
Slave Mode Specific Configuration
Master Mode Specific Configuration
Setting the System Clock
I2C Interrupts
Operation Using Manual Acknowledgment
Operation Using Automatic Acknowledgment
I2C Main Modes of Operation
LIN
LIN Responder Mode
Lin Commander Mode
Pulse Code Modulation (PCM) Interface
PCM Signal Configuration
Frame Signal Configuration and Timing
Data Serial Input and Output Configuration
PCM/I2S Data Interface
PCM Interrupt Configuration
I2S Configuration and Usage
PWM
ACS_PWM
Serial Peripheral Interfaces (SPI)
SPI Data Transfers
SPI Interrupts
SPI DMA Control
Universal Asynchronous Receiver-Transmitter (UART) Interfaces
UART Interrupts
Communication Interfaces Registers
I2C Registers
I2C_CFG
I2C_CTRL
I2C_ADDR_START
I2C_STATUS
I2C_TX_DATA
I2C_RX_DATA
I2C_RX_DATA_MIRROR
I2C_ID_NUM
LIN Registers
LIN_CFG
LIN_CTRL
LIN_ERROR
LIN_PID
LIN_DLB
LIN_DLBR
LIN_DATA
LIN_DATA_WORD0
LIN_DATA_WORD1
LIN_CHECKSUM
LIN_SYNCH
LIN_ID_NUM
PCM Registers
PCM_CTRL
PCM_CFG
PCM_STATUS
PCM_TX_DATA0
PCM_TX_DATA1
PCM_RX_DATA0
PCM_RX_DATA1
PCM_ID_NUM
PWM Registers
PWM_PERIOD
PWM_CTRL
PWM_OFFSET
PWM_HIGH
PWM_ID_NUM
ACS_PWM_AO_CFG
ACS_PWM_AO_CTRL
ACS_PWM_AO_COUNT
SPI Registers
SPI_CFG
SPI_CTRL
SPI_STATUS
SPI_TX_DATA
SPI_RX_DATA
SPI_RX_DATA_NO_START
SPI_RX_DATA_MIRROR
SPI_ID_NUM
UART Registers
UART_CFG
UART_CTRL
UART_STATUS
UART_TX_DATA
UART_RX_DATA
UART_ID_NUM
Sensor Interfaces
Analog Comparator
Functional Description
Block Diagram
SAR-ADC
Power Source
Functional Description
Block Diagram
ADC Calibration
ADC Outputs
Timing Diagrams
Pulse Counter
LSAD
LSAD Input Configuration
LSAD Sampling Configuration
LSAD Output Data
Voltage Monitoring
LSAD and Voltage Monitoring Interrupt
Using LSAD calibration data
Simple Low-Power DAC
Functional Description
Current Source
Description
Current Source Configuration
Temperature Calculation
Internal Temperature Sensor
Enabling the Temperature Sensor
Calibration Procedures
One-Point Calibration
Two-Point Calibration
Ultra-Low Power Data Acquisition Subsystem
Clock Source Configuration
Input Configuration
Sample Accumulation
Sample Storage
Signal Threshold Detection
Sensor Interfaces Registers
Analog Comparator Registers
ACS_ACOMP_CFG
ACS_ACOMP_OUT
SAR-ADC Registers
SENSOR_SAR_CFG
SENSOR_SAR_CTRL
SENSOR_SAR_DATA
Pulse Counter Registers
SENSOR_PC_CFG
SENSOR_PC_COUNT
LSAD Registers
LSAD_DATA_TRIM_CH
LSAD_DATA_AUDIO_CH
LSAD_INPUT_SEL
LSAD_CFG
LSAD_OFFSET
LSAD_INT_ENABLE
LSAD_MONITOR_CFG
LSAD_MONITOR_COUNT_VAL
LSAD_MONITOR_STATUS
LSAD_PRE_SEL_INPUT
LSAD_DUTY
LSAD_ID_NUM
SDAC Registers
ACS_SDAC_CFG
Current Source Registers
ACS_TEMP_CURR_CFG
Internal Temperature Sensor Registers
ACS_TEMP_SENSOR_CFG
ULP Registers
SENSOR_CFG
SENSOR_CTRL
SENSOR_FIFO_CFG
SENSOR_PROCESSING
SENSOR_FIFO_DATA
Peripherals
Activity Counters
Asynchronous Clock Counter
Cyclic Redundancy Check (CRC) Generator
Direct Memory Access (DMA) Controller
Block Overview
Functional Description
DMA to Peripherals Interface
Configuration and Status
DMA Interrupt Configuration
Circular Mode
Word Size
Packing and Unpacking
DMA Operation
DMA Channel Arbiter
Flash Copier
Time of Flight
BLE Link Filtering
Timers
Starting or Stopping Timers
Mode Selection
GPIO Interrupt Capture Mode
Watchdog Timer
Peripherals Registers
Activity Counters Registers
SYSCTRL_CNT_CTRL
SYSCTRL_SYSCLK_CNT
SYSCTRL_CM33_CNT
SYSCTRL_CBUS_CNT
SYSCTRL_FLASH_READ_CNT
Asynchronous Clock Counter Registers
ASCC_CTRL
ASCC_CFG
ASCC_CNT
ASCC_PHASE_CNT
ASCC_PERIOD_CNT
ASCC_ID_NUM
CRC Registers
CRC_CFG
CRC_VALUE
CRC_ADD_1
CRC_ADD_8
CRC_ADD_16
CRC_ADD_24
CRC_ADD_32
CRC_FINAL
CRC_ID_NUM
DMA Registers
DMA_CFG0
DMA_CFG1
DMA_CTRL
DMA_STATUS
DMA_SRC_ADDR
DMA_DEST_ADDR
DMA_CNTS
DMA_SRC_BUFFER
DMA_ID_NUM
Flash Copier Registers
FLASH_COPY_CFG
FLASH_COPY_CTRL
FLASH_COPY_SRC_ADDR_PTR
FLASH_COPY_DST_ADDR_PTR
FLASH_COPY_WORD_CNT
Time of Flight Registers
TOF_CFG
TOF_CTRL
TOF_STATUS
TOF_LINK_CFG
TOF_DATA
TOF_MIN_DATA
TOF_MAX_DATA
TOF_AVG_DATA
TOF_ID_NUM
Timers Registers
TIMER_CFG0
TIMER_CFG1
TIMER_CTRL
TIMER_VAL
TIMER_VAL_CAPTURE
TIMER_ID_NUM
Watchdog Timer Registers
WATCHDOG_CFG
WATCHDOG_CTRL
WATCHDOG_ID_NUM
Registers
System Control
Clock Generation
Reset
Watchdog Timer
General-Purpose Timers
Flash Interface
GPIO Interface and Digital Pad control
DMA Controller
LIN Interface
LSAD
Sensor Interface
SPI Interface
PCM Interface
I2C Interface
TEST Control Interface
UART Interface
PWM Interface
CRC Generator Control
ASCC
ACS
AHB registers
Baseband Controller Interface
Baseband Controller
RF Front-End 2.4 GHz
Implementation Control Block
SysTick Timer
Time Of Flight Timer
System Control and ID register not in the SCB
Nested Vector Interrupt Controller
System Control Block
Memory Protection Unit
Security Attribution Unit
Debug Control Block
Software Interrupt Generation
Floating-Point Extension
Security User’s Guide
Overview of Security Features
Partitioning Between Secure and Non-Secure
Cryptographic Hardware Features Supporting Security
Bluetooth Specific Features
Additional Security Features
Security Mechanism Upon Boot
Side Channel Attacks
Operational States
Device and Life Cycle States
Device States
Life Cycle States
Root of Trust State LCS Properties and Transition Requirements
Energy Harvesting State (EH_STATE)
EH_STATE Features
Revoking EH_STATE
EH_STATE Security Features
Overview
Locking Process
Locking a Device
Setting the DCU Bits
Setting the SOC ID
Unlocking a Locked Device for Debug
Unlock
Relock
Revoking the EH_STATE
Secure Root of Trust State (ROT_STATE)
ROT_STATE Features
Chip Manufacture State (LCS_CM)
LCS_CM to LCS_DM Transition
Device Manufacture State (LCS_DM)
LCS_DM to LCS_SE Transition
Secure State (LCS_SE)
LCS_SE to LCS_RMA and LCS_DM to LCS_RMA
Return Merchandise Authorization State (LCS_RMA)
ROT_STATE Constraints
Roots Of Trust (RoTs)
Overview
Root of Trust: The Mechanics
Self-Signed Certificates
Types of Certificate
Certificate Chains
Authenticating an Application to be Executed
Roots of Trust Summary
Secure RoT Resources
NVM Storage
Additional Information
Secure Provisioning
Application Certificates and Configuration Items
Key Certificate Generation
Content Certificate Generation
Application Signing
Debug Certificates and SOC ID
Secure Boot Flow
Application Signing
Secure Debug Flow
Secure Applications
Application Signing
Application Configuration Block
Application Image
Debug Certificate Loading Process And Constraints
Reserving Space for the Application Configuration Block and Debug Certificates
Loading Debug Certificates to a Device
The Data Exchange Unit (DEU)
Data Exchange Flow
Data Exchange Unit Protocols
Security Tool Support
Getting Started
Overview
Software Installation
Hardware Set Up
RSLSec PC-Based Tool
RSLSec Common Options
EH State Configuration And Usage
Overview
Using LCS_EH Features in RSLSec
Updating a device
Unlocking a device
Relocking a device
RSLSec Command Examples for LCS_EH
RoT Secure Mode Configuration And Usage
Provisioning Process
Required Assets When Securing A Device
Initial Resource Creation
Key Generation and Usage
Asset Organization for Demonstration
Krtl
Root of Trust Key Pair
Provisioning and Code Encryption Keys
Provisioning CM to DM
Unlocking a Device Using Debug Certificates
Overview of Required Assets
Creation of Keys, Certificates and Unlocking
LCS_DM
LCS_SE
Provisioning DM to SE
Transition to LCS_RMA
Creating and Executing a Secure Application
Creating a Secure Application
Creating and Executing a Secure Application
Creating a Secure Application in LCS_DM using HBK0
Creating a Secure Application in LCS_SE using HBK1
Transition from EH_STATE to ROT_STATE
Revoking EH_STATE
Secure Bootloader Guide
Overview
Common Features
RSL15 Secure Bootloader Usage Options
Functionality Access Options
Configuration
Memory Partitioning Overview
PSA Compliance Background
Overview of PSA Compliance
Basic Bootloader
General Usage
Secure Bootloader
Booting a Secure Application
Updating a Secure Application
Updating the Secure Bootloader Itself
Support for Immutable Portions in the Secure Bootloader
Secure Storage
Secure Storage Area
Content to be Stored in Secure Storage
API
Basic Operation
Attestation
Overview and Background
Attestation Interface
Key Injection
Get Token
Get Token Size
Key Injection Process
Attestation Token
Format of Token
EAT Additional Details
Attestation Token Request
Secure Bootloader Sample Reference
Secure Bootloader Sample Reference Typedef Documentation
Secure Bootloader Sample Reference Variable Documentation
Secure Bootloader Sample Reference Data StructuresType Documentation
Secure Bootloader Sample Reference Enumeration Type Documentation
Secure Bootloader Sample Reference Macro Definition Documentation
Secure Bootloader Sample Reference Function Documentation
Device Firmware Update (DFU) Guide
Overview
Prerequisites
Bootloader
Overview
Bootloader Firmware
Image Format
Load Image
The Bootloader Protocol For Writing Binary Files Using UART
RESP
HELLO
PROG
Restart
The FOTA Firmware
FOTA Overview
FOTA Partitioning
Firmware Startup
Application Only Update
Application + FOTA Bluetooth Low Energy Stack Update
Performing Your First FOTA Update
Generating the FOTA Firmware Image
Setting Up the Bootloader and Loading a Firmware Image Using UART
Performing a FOTA Update Using BLE Explorer
FOTA Image
Overview
mkfotaimg.py
Sub-Image Format
The DFU
DFU Component
Update Sequence
FOTA Stack Source Code
DFU Bluetooth Low Energy Service
DFU Service Characteristics
DFU Protocol
Integrating FOTA Into Your Application
Modifying the Application
Performing a FOTA Update
The Secure Bluetooth Low Energy FOTA Application
Working with ble_peripheral_server_fota
Step 1: Generate the application’s firmware image
Step 2: Sign the Application's Firmware Image
Step 3: Create a FOTA Image
Step 4: Test the Secure ble_peripheral_server_fota Application
RSL FOTA Mobile Application
RSL FOTA Application
RSL FOTA Android Limitations
RSL FOTA iOS Limitations
Evaluation and Development Board Manual
Glossary
Change History
Rights and Disclaimers / Publication Ordering
Notice: Inappropriate Terminology
Searching this Documentation
Document Conventions
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