Supplemental Calibration Library Reference Macro Definition Documentation

 

CALIBRATE_FW_VER_MAJOR

#define CALIBRATE_FW_VER_MAJOR 0x02

 

Location: calibrate.h:46

 

Major version of Calibration Library.

 

CALIBRATE_FW_VER_MINOR

#define CALIBRATE_FW_VER_MINOR 0x01

 

Location: calibrate.h:49

 

Minor version of Calibration Library.

 

CALIBRATE_FW_VER_REVISION

#define CALIBRATE_FW_VER_REVISION 0x00

 

Location: calibrate.h:52

 

Revision of Calibration Library.

 

CALIBRATE_FW_VER

#define CALIBRATE_FW_VER ((CALIBRATE_FW_VER_MAJOR << 12) | \ (CALIBRATE_FW_VER_MINOR << 8) | \ CALIBRATE_FW_VER_REVISION)

 

Location: calibrate.h:55

 

Firmware Calibration Library Version Code.

 

ERRNO_POWER_CAL_MARKER

#define ERRNO_POWER_CAL_MARKER 0x10

 

Location: calibrate.h:64

 

Power supply calibration related errors marker.

 

ERRNO_VBG_CAL_ERROR

#define ERRNO_VBG_CAL_ERROR (0x0001 | ERRNO_POWER_CAL_MARKER)

 

Location: calibrate.h:67

 

Error during bandgap calibration process.

 

ERRNO_VDDRF_CAL_ERROR

#define ERRNO_VDDRF_CAL_ERROR (0x0002 | ERRNO_POWER_CAL_MARKER)

 

Location: calibrate.h:70

 

Error during VDDRF calibration process.

 

ERRNO_VDDPA_CAL_ERROR

#define ERRNO_VDDPA_CAL_ERROR (0x0003 | ERRNO_POWER_CAL_MARKER)

 

Location: calibrate.h:73

 

Error during VDDPA calibration process.

 

ERRNO_DCDC_CAL_ERROR

#define ERRNO_DCDC_CAL_ERROR (0x0004 | ERRNO_POWER_CAL_MARKER)

 

Location: calibrate.h:76

 

Error during DC-DC calibration process.

 

ERRNO_VDDC_CAL_ERROR

#define ERRNO_VDDC_CAL_ERROR (0x0005 | ERRNO_POWER_CAL_MARKER)

 

Location: calibrate.h:79

 

Error during VDDC calibration process.

 

ERRNO_VDDM_CAL_ERROR

#define ERRNO_VDDM_CAL_ERROR (0x0006 | ERRNO_POWER_CAL_MARKER)

 

Location: calibrate.h:82

 

Error during VDDM calibration process.

 

ERRNO_VDDIF_CAL_ERROR

#define ERRNO_VDDIF_CAL_ERROR (0x0007 | ERRNO_POWER_CAL_MARKER)

 

Location: calibrate.h:85

 

Error during VDDIF calibration process.

 

ERRNO_VDDFLASH_CAL_ERROR

#define ERRNO_VDDFLASH_CAL_ERROR (0x0008 | ERRNO_POWER_CAL_MARKER)

 

Location: calibrate.h:88

 

Error during VDDFLASH calibration process.

 

ERRNO_STORAGE_CAL_ERROR

#define ERRNO_STORAGE_CAL_ERROR (0x0009 | ERRNO_POWER_CAL_MARKER)

 

Location: calibrate.h:91

 

Error during storage calibration process.

 

ERRNO_CLK_CAL_MARKER

#define ERRNO_CLK_CAL_MARKER 0x20

 

Location: calibrate.h:94

 

Clock calibration related errors marker.

 

ERRNO_RCOSC_CAL_ERROR

#define ERRNO_RCOSC_CAL_ERROR (0x0001 | ERRNO_CLK_CAL_MARKER)

 

Location: calibrate.h:97

 

Error during RC 32 kHz oscillator calibration process.

 

ERRNO_START_OSC_CAL_ERROR

#define ERRNO_START_OSC_CAL_ERROR (0x0002 | ERRNO_CLK_CAL_MARKER)

 

Location: calibrate.h:100

 

Error during RC Start oscillator calibration process.

 

ERRNO_INVALID_MIN_MAX_ERROR

#define ERRNO_INVALID_MIN_MAX_ERROR (0x0003 | ERRNO_CLK_CAL_MARKER)

 

Location: calibrate.h:103

 

Invalid input to binary search algorithm.

 

TRIMMING_STEP

#define TRIMMING_STEP 0.015

 

Location: calibrate_clock.h:35

 

Size of trimming steps for RC oscillator, 1.5%.

 

ASYNC_CLK_PERIODS

#define ASYNC_CLK_PERIODS 16

 

Location: calibrate_clock.h:38

 

Number of asynchronous clock periods to measure over.

 

CAL_32K_RCOSC

#define CAL_32K_RCOSC 1

 

Location: calibrate_clock.h:41

 

Select to calibrate the 32 kHz RC oscillator.

 

CAL_START_OSC

#define CAL_START_OSC 2

 

Location: calibrate_clock.h:44

 

Select to calibrate the Start RC oscillator.

 

CAL_RC32OSC_DEFAULT

#define CAL_RC32OSC_DEFAULT 32768U

 

Location: calibrate_clock.h:47

 

RC32 OSC default target frequency.

 

MHZ_TO_HZ

#define MHZ_TO_HZ 1000000U

 

Location: calibrate_clock.h:50

 

Conversion factor between SMHz to Hz or vice versa.

 

TEN_MS_QUOTIENT

#define TEN_MS_QUOTIENT 100U

 

Location: calibrate_clock.h:53

 

Conversion factor between MHz to Hz or vice versa.

 

NON_MONOTONIC_POINTS

#define NON_MONOTONIC_POINTS 3

 

Location: calibrate_clock.h:56

 

Number of points to check when encountering non-monotonic code.

 

MONOTONIC_POINTS

#define MONOTONIC_POINTS 1

 

Location: calibrate_clock.h:59

 

Number of points to check when encountering monotonic code.

 

NON_MONOTONIC_CODE32

#define NON_MONOTONIC_CODE32 32

 

Location: calibrate_clock.h:62

 

Number of points to check when encountering monotonic code.

 

NON_MONOTONIC_CODE48

#define NON_MONOTONIC_CODE48 48

 

Location: calibrate_clock.h:65

 

Number of points to check when encountering monotonic code.

 

MIN_RCCLK_24

#define MIN_RCCLK_24 10500000UL

 

Location: calibrate_clock.h:75

 

Minimum frequency of 24 MHz oscillator setting worst case.

 

MAX_RCCLK_24

#define MAX_RCCLK_24 50000000UL

 

Location: calibrate_clock.h:78

 

Maximum frequency of 24 MHz oscillator setting worst case.

 

RFCLK_FREQ

#define RFCLK_FREQ 8000000UL

 

Location: calibrate_clock.h:81

 

RFCLK frequency measured.

 

XTAL48_ERROR_LIMIT_MIN

#define XTAL48_ERROR_LIMIT_MIN MIN_RCCLK_24 / RFCLK_FREQ * ASYNC_CLK_PERIODS

 

Location: calibrate_clock.h:84

 

MIN = MIN RCCLK / 8 MHz * 16 ASCC periods.

 

XTAL48_ERROR_LIMIT_MAX

#define XTAL48_ERROR_LIMIT_MAX MAX_RCCLK_24 / RFCLK_FREQ * ASYNC_CLK_PERIODS

 

Location: calibrate_clock.h:87

 

MAX = MAX RCCLK / 8 MHz * 16 ASCC periods.

 

STANDBYCLK_FREQ

#define STANDBYCLK_FREQ 32768U

 

Location: calibrate_clock.h:90

 

RFCLK frequency measured.

 

XTAL32_ERROR_LIMIT_MIN

#define XTAL32_ERROR_LIMIT_MIN MIN_RCCLK_24 / STANDBYCLK_FREQ * ASYNC_CLK_PERIODS

 

Location: calibrate_clock.h:93

 

MIN = MIN RCCLK / 32768 Hz * 16 ASCC periods.

 

XTAL32_ERROR_LIMIT_MAX

#define XTAL32_ERROR_LIMIT_MAX MAX_RCCLK_24 / STANDBYCLK_FREQ * ASYNC_CLK_PERIODS

 

Location: calibrate_clock.h:96

 

MAX = MAX RCCLK / 32768 Hz * 16 ASCC periods.

 

CONVERT_MHZ_TO_CYCLES

#define CONVERT_MHZ_TO_CYCLES (((y) * (z)) / (x))

 

Location: calibrate_clock.h:118

 

Calculates the number of cycles to be returned by the ASCC.

 

The ASCC returns the number of SYSCLK cycles between n number of periods in the input clock. x The value in MHz that must be converted to a cycle count y The frequency of the SYSCLK (Hz) z The number of periods that the ASCC measures.
Returns:
Number of system clock cycles between n periods of the input clock.

 

Example Code for CONVERT_MHZ_TO_CYCLES

    // Convert a frequency value in MHz to cycles.

    result = CONVERT_MHZ_TO_CYCLES(TARGET_RC32K, \

                                  SystemCoreClock, \ 

                                  ASYNC_CLK_PERIODS);


Returns:
Number of system clock cycles between n periods of the input clock.

 

Example Code for CONVERT_MHZ_TO_CYCLES

    // Convert a frequency value in MHz to cycles.

    result = CONVERT_MHZ_TO_CYCLES(TARGET_RC32K, \

                                  SystemCoreClock, \ 

                                  ASYNC_CLK_PERIODS);

 

Parameters

Direction Name Description

in

x

The value in MHz that must be converted to a cycle count

in

y

The frequency of the SYSCLK (Hz)

in

z

The number of periods that the ASCC measures.

 

LSAD_STABILIZED_RANGE

#define LSAD_STABILIZED_RANGE 10

 

Location: calibrate_power.h:39

 

LSAD variance in LSBs considered "stable" and not discharging.

 

LSAD_MEASUREMENT_ERROR

#define LSAD_MEASUREMENT_ERROR 5

 

Location: calibrate_power.h:43

 

Set the LSAD measurement error to 5 [mV].

 

The trim step size is 10 mV so ideally every value 5 mV apart can be reached.

 

LSAD_IF_MEASUREMENT_ERROR

#define LSAD_IF_MEASUREMENT_ERROR 13

 

Location: calibrate_power.h:47

 

Set the LSAD measurement error to 13 [mV].

 

The trim step size for VDDIF/FLASH is 25 mV so ideally every value 12.5 mV apart can be reached, rounded up to 13 mV.

 

LSAD_NUM_CHANNELS

#define LSAD_NUM_CHANNELS 8

 

Location: calibrate_power.h:50

 

Number of LSAD channels in device.

 

VDDCM_TARGET_OFFSET

#define VDDCM_TARGET_OFFSET 5

 

Location: calibrate_power.h:54

 

Offset the desired target to ensure while calibrating.

 

We guarantee that we do not go under the desired target voltage

 

BG_VTRIM_0P820V_BYTE

#define BG_VTRIM_0P820V_BYTE ((uint8_t)(0x2AU << ACS_BG_CTRL_VTRIM_BYTE_Pos))

 

Location: calibrate_power.h:57

 

Bandgap maximum safe voltage - 1 trim step.

 

VDDM_TRIM_0P95V_BYTE

#define VDDM_TRIM_0P95V_BYTE ((uint8_t)(0x0FU << ACS_VDDM_CTRL_VTRIM_BYTE_Pos))

 

Location: calibrate_power.h:60

 

Digital Memories voltage regulator minimum safe voltage to maintain function.

 

VDDFLASH_TRIM_1P500V_BYTE

#define VDDFLASH_TRIM_1P500V_BYTE ((uint8_t)(0x1EU << ACS_VDDM_CTRL_VTRIM_BYTE_Pos))

 

Location: calibrate_power.h:63

 

Flash voltage regulator minimum safe voltage to maintain function.

 

VDDFLASH_TRIM_1P850V_BYTE

#define VDDFLASH_TRIM_1P850V_BYTE ((uint8_t)(0x2CU << ACS_VDDM_CTRL_VTRIM_BYTE_Pos))

 

Location: calibrate_power.h:66

 

Flash voltage regulator maximum safe voltage.

 

V_TO_MV

#define V_TO_MV 1000

 

Location: calibrate_power.h:69

 

Factor for converting back and forth from mV to V.

 

V_TO_MV_F

#define V_TO_MV_F 1000.0f

 

Location: calibrate_power.h:72

 

Float iteration of factor for converting back and forth from mV to V.

 

CONVERT

#define CONVERT ((uint32_t)((x * 1000) >> 13))

 

Location: calibrate_power.h:84

 

Converts an ADC code to a voltage, calculated as follows voltage = adc_code * (2 V * 1000 [mV]/1 V / 2^14 steps.)

 


Returns:
The voltage output in mV

Assumptions

Low frequency mode for the ADC is used, meaning that the resolution of the ADC is 14-bits. CONVERT provides voltage level as a milliVolt value based on the input ADC code.

 

Parameters

Direction Name Description

in

x

the ADC code input

 

SWAP

#define SWAP ((t) = (a), (a) = (b), (b) = (t))

 

Location: calibrate_power.h:95

 

Swap the values in variables a and b.

 


Returns:
a holds the value previously in b, b holds the value previously in a.

 

Parameters

Direction Name Description

in

a

holds the value that must go to b

in

b

holds the value that must go to a

in

t

a temporary buffer for the swap